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author | Jonathan Kollasch <jakllsch@kollasch.net> | 2010-11-11 22:25:55 +0000 |
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committer | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2010-11-11 22:25:55 +0000 |
commit | ab940df3315549468e79d31d0b86874830816590 (patch) | |
tree | 763e217b85b7b0681aa788fa7ec738c30e70d5a5 /src/superio/fintek/f71872/f71872.h | |
parent | 5330dd91741d12ae52b9c5db179c1a6c24f3e56c (diff) | |
download | coreboot-ab940df3315549468e79d31d0b86874830816590.tar.xz |
Add support for Fintek F71872 superio.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/fintek/f71872/f71872.h')
-rw-r--r-- | src/superio/fintek/f71872/f71872.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/superio/fintek/f71872/f71872.h b/src/superio/fintek/f71872/f71872.h new file mode 100644 index 0000000000..5b9b3535ba --- /dev/null +++ b/src/superio/fintek/f71872/f71872.h @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007 Corey Osgood <corey@slightlyhackish.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SUPERIO_FINTEK_F71872_F71872_H +#define SUPERIO_FINTEK_F71872_F71872_H + +/* Logical Device Numbers (LDN). */ +#define F71872_FDC 0x00 /* Floppy */ +#define F71872_SP1 0x01 /* UART1 */ +#define F71872_SP2 0x02 /* UART2 */ +#define F71872_PP 0x03 /* Parallel Port */ +#define F71872_HWM 0x04 /* Hardware Monitor */ +#define F71872_KBC 0x05 /* Keyboard/Mouse */ +#define F71872_GPIO 0x06 /* GPIO */ +#define F71872_VID 0x07 /* VID */ +#define F71872_PM 0x0a /* ACPI/PME */ + +#endif |