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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-11-01 10:19:58 +1100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-11-01 21:28:43 +0100
commit27a63d77339ea47133d150e1383fd236a332afe5 (patch)
treeb0328ed2b29eaf967ae6a60e310e03a25a8fcb71 /src/superio/fintek/f81216h/f81216h.h
parentb14bf88697950c63fa786cbd70dab3070e464807 (diff)
downloadcoreboot-27a63d77339ea47133d150e1383fd236a332afe5.tar.xz
superio/fintek/f81216h: Implement device support
Change-Id: I20a34b569f109dd12af29e9e0cee8f7f6b8ebb80 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7309 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Diffstat (limited to 'src/superio/fintek/f81216h/f81216h.h')
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1 files changed, 46 insertions, 0 deletions
diff --git a/src/superio/fintek/f81216h/f81216h.h b/src/superio/fintek/f81216h/f81216h.h
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+++ b/src/superio/fintek/f81216h/f81216h.h
@@ -0,0 +1,46 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SUPERIO_FINTEK_F81216H_H
+#define SUPERIO_FINTEK_F81216H_H
+
+/* Logical Device Numbers (LDN). */
+#define F81216H_SP1 0x00 /* UART1 (+CIR mode) */
+#define F81216H_SP2 0x01 /* UART2 */
+#define F81216H_SP3 0x02 /* UART3 */
+#define F81216H_SP4 0x03 /* UART4 */
+#define F81216H_WDT 0x08 /* WDT */
+
+/**
+ * The PNP config entry key is parameterised
+ * by two bits on this Super I/O with 0x77 as
+ * the default key.
+ * See page 17 of data sheet for details.
+ */
+enum {
+ MODE_6767,
+ MODE_7777,
+ MODE_8787,
+ MODE_A0A0,
+} mode_key;
+
+void f81216h_enable_serial(pnp_devfn_t dev, u16 iobase, enum mode_key k);
+
+#endif /* SUPERIO_FINTEK_F81216H_H */