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authorAngel Pons <th3fanbus@gmail.com>2019-08-30 19:42:23 +0200
committerNico Huber <nico.h@gmx.de>2019-09-03 09:51:07 +0000
commitef879a8f30137a7082c365091729e31bedec69d6 (patch)
treeac114074de3a40edd05966c806c8c54ce285fc8c /src/superio/fintek/f81865f
parent5dee36464e05543c9603cf3d4c2890fcd3b3f32a (diff)
downloadcoreboot-ef879a8f30137a7082c365091729e31bedec69d6.tar.xz
soc/skylake: do not rely on P2SB data to generate DRHD
The P2SB PCI device can be "hidden", which causes all sorts of nightmares and bugs. Moreover, FSP tends to hide it, so finding a good solution to this problem is impossible with FSP into the mix. Since the values for IBDF and HBDF were already hardcoded as FSP parameters, define them as macros and use these values directly to generate the DRHD. Change-Id: I7eb20182380b953a1842083e7a3c67919d6971b9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35108 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mimoja <coreboot@mimoja.de> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
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