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authorFabian Kunkel <fabi@adv.bruhnspace.com>2016-07-07 15:15:18 +0200
committerMartin Roth <martinroth@google.com>2016-08-02 18:57:36 +0200
commit145796e171fdba246bb7a224f33dc050a16f0a30 (patch)
treee53f3a8663a00a532a398dfb22816a90289237ac /src/superio/fintek/f81866d/Makefile.inc
parentae39fc45a8577ea0dab093a7aefcc336ecae88ea (diff)
downloadcoreboot-145796e171fdba246bb7a224f33dc050a16f0a30.tar.xz
superio/fintek/f81866d: Add support for UART 3/4
Pins for UART 3/4 are by default GPIO pins. This patch sets the pins in UART mode. Since UART 1/3 and 2/4 share the same interrupt line, the patch needs to enable also shared interrupts. Datasheet: Name: F81866D/A-I, Release Date: Jan 2012, Version: V0.12P Link: http://www.alldatasheet.com/datasheet-pdf/pdf/459085/FINTEK/F81866AD-I.html Change-Id: Ief5d70c8b25a2fb6cd787c45a52410e20b0eaf2e Signed-off-by: Fabian Kunkel <fabi@adv.bruhnspace.com> Reviewed-on: https://review.coreboot.org/15564 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/superio/fintek/f81866d/Makefile.inc')
-rw-r--r--src/superio/fintek/f81866d/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/superio/fintek/f81866d/Makefile.inc b/src/superio/fintek/f81866d/Makefile.inc
index 8654659799..b3fd34fd56 100644
--- a/src/superio/fintek/f81866d/Makefile.inc
+++ b/src/superio/fintek/f81866d/Makefile.inc
@@ -16,5 +16,5 @@
## GNU General Public License for more details.
##
-ramstage-$(CONFIG_SUPERIO_FINTEK_F81866D) += f81866d_hwm.c
+ramstage-$(CONFIG_SUPERIO_FINTEK_F81866D) += f81866d_hwm.c f81866d_uart.c
ramstage-$(CONFIG_SUPERIO_FINTEK_F81866D) += superio.c