diff options
author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-01-16 13:44:33 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2019-01-24 09:10:13 +0000 |
commit | 5449007425c23dd1b5aaeb64d6ab976893ffe023 (patch) | |
tree | 4673d474ebf2d2e840f5c9f649bc674af175a68b /src/superio/ite/it8528e/superio.c | |
parent | 2b218e3e512e771a977101b07574a51a65853a7a (diff) | |
download | coreboot-5449007425c23dd1b5aaeb64d6ab976893ffe023.tar.xz |
superio/ite: Add it8528e
* Add support for the SuperIO part of IT8528E
* Based on the IT8528E datasheet and tests on vendor firmware
TODO: Add support for accessing EC space, which should be
implemented in src/ec/ instead, as it's a separate logical unit.
No datasheet is publicy available.
Tested on wedge100s.
The serial works under the OS without CONFIG_CONSOLE_SERIAL.
Change-Id: I72aa756e123d6f99d9ef4fe955c4b7f1be25d547
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/30957
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/superio/ite/it8528e/superio.c')
-rw-r--r-- | src/superio/ite/it8528e/superio.c | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/src/superio/ite/it8528e/superio.c b/src/superio/ite/it8528e/superio.c new file mode 100644 index 0000000000..72e287093d --- /dev/null +++ b/src/superio/ite/it8528e/superio.c @@ -0,0 +1,73 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de> + * Copyright (C) 2007 Philipp Degler <pdegler@rumms.uni-mannheim.de> + * Copyright (C) 2017 Gergely Kiss <mail.gery@gmail.com> + * Copyright (C) 2019 9Elements GmbH <patrick.rudolph@9elements.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <device/device.h> +#include <device/pnp.h> +#include <arch/io.h> +#include <stdlib.h> +#include <superio/conf_mode.h> + +#include "it8528e.h" + +static void it8528e_init(struct device *dev) +{ +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_alt_enable, + .init = it8528e_init, + .ops_pnp_mode = &pnp_conf_mode_870155_aa, +}; + +static struct pnp_info pnp_dev_info[] = { + { NULL, IT8528E_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8, }, + { NULL, IT8528E_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8, }, + { NULL, IT8528E_SWUC, PNP_IO0 | PNP_IRQ0, 0xfff0, }, + { NULL, IT8528E_KBCM, PNP_IRQ0, }, + /* Documentation: Program io0 = 0x60 and io1 = 0x64 */ + { NULL, IT8528E_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff, }, + { NULL, IT8528E_IR, PNP_IO0 | PNP_IRQ0, 0xfff8, }, + { NULL, IT8528E_SMFI, PNP_IO0 | PNP_IRQ0, 0xfff0, }, + /* Documentation: Program io0 = 0x70 and io1 = 0x272 */ + { NULL, IT8528E_RTCT, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0, + 0xfffe, 0xfffe, 0xfffe, 0xfffe}, + /* Documentation: Program io0 = 0x62 and io1 = 0x66 */ + { NULL, IT8528E_PMC1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff }, + { NULL, IT8528E_PMC2, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IRQ0, 0x07fc, + 0x07fc, 0xfff0 }, + /* Documentation is unclear if PMC3-5 have LPC I/O decoding support */ + { NULL, IT8528E_PMC3, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff }, + { NULL, IT8528E_PMC4, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff }, + { NULL, IT8528E_PMC5, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x07ff, 0x07ff }, + { NULL, IT8528E_SSPI, PNP_IO0 | PNP_IRQ0, 0xfff8 }, + { NULL, IT8528E_PECI, PNP_IO0, 0xfff8 }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info); +} + +struct chip_operations superio_ite_it8528e_ops = { + CHIP_NAME("ITE IT8528E Super I/O") + .enable_dev = enable_dev, +}; |