Various minor cosmetic changes in the ITE Super I/Os, mostly whitespace

changes and fixing of comments.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

4 files changed, 8 insertions, 9 deletions

diff --git a/src/superio/ite/it8661f/Config.lb b/src/superio/ite/it8661f/Config.lb
index 6a4d526a7c..a03c28b1c8 100644
--- a/src/superio/ite/it8661f/Config.lb
+++ b/src/superio/ite/it8661f/Config.lb
@@ -20,3 +20,4 @@
 
 config chip.h
 object superio.o
+
diff --git a/src/superio/ite/it8661f/chip.h b/src/superio/ite/it8661f/chip.h
index 4931655178..691f0e2ab5 100644
--- a/src/superio/ite/it8661f/chip.h
+++ b/src/superio/ite/it8661f/chip.h
@@ -23,14 +23,12 @@
 
 /* This chip doesn't seem to have keyboard and mouse support. */
 
-/* #include <pc80/keyboard.h> */
 #include <uart8250.h>
 
 extern struct chip_operations superio_ite_it8661f_ops;
 
 struct superio_ite_it8661f_config {
 	struct uart8250 com1, com2;
-	/* struct pc_keyboard keyboard; */
 };
 
 #endif /* _SUPERIO_ITE_IT8661F */
diff --git a/src/superio/ite/it8661f/it8661f.h b/src/superio/ite/it8661f/it8661f.h
index 434aebc2f7..09059810f5 100644
--- a/src/superio/ite/it8661f/it8661f.h
+++ b/src/superio/ite/it8661f/it8661f.h
@@ -19,7 +19,7 @@
  */
 
 /* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8661_2.asp */
-/* Status: untested on real hardware, but it compiles. */
+/* Status: Untested on real hardware, but it compiles. */
 
 /* This chip doesn't seem to have keyboard and mouse support. */
 
diff --git a/src/superio/ite/it8661f/it8661f_early_serial.c b/src/superio/ite/it8661f/it8661f_early_serial.c
index ffec3bcd30..522ddf71cf 100644
--- a/src/superio/ite/it8661f/it8661f_early_serial.c
+++ b/src/superio/ite/it8661f/it8661f_early_serial.c
@@ -26,7 +26,7 @@
 #define SIO_INDEX                  SIO_BASE
 #define SIO_DATA                   SIO_BASE+1
 
-/* Global Configuration Registers. */
+/* Global configuration registers. */
 #define IT8661F_CONFIG_REG_CC      0x02   /* Configure Control (write-only). */
 #define IT8661F_CONFIG_REG_LDN     0x07   /* Logical Device Number. */
 #define IT8661F_CONFIG_REG_LDE     0x23   /* PnP Logical Device Enable. */
@@ -35,7 +35,7 @@
 #define IT8661F_CONFIGURATION_PORT 0x0279 /* Write-only. */
 
 /* Special values used for entering MB PnP mode. The first four bytes of
- * each line determine the address port, the last four are data. */
+   each line determine the address port, the last four are data. */
 static const uint8_t init_values[] = {
 	0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe,
 	0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61,
@@ -44,7 +44,7 @@ static const uint8_t init_values[] = {
 };
 
 /* The content of IT8661F_CONFIG_REG_LDN (index 0x07) must be set to the
- * LDN the register belongs to, before you can access the register. */
+   LDN the register belongs to, before you can access the register. */
 static void it8661f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
 {
 	outb(IT8661F_CONFIG_REG_LDN, SIO_BASE);
@@ -53,7 +53,7 @@ static void it8661f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
 	outb(value, SIO_DATA);
 }
 
-/* Enable the peripheral devices on the IT8661F Super IO chip. */
+/* Enable the peripheral devices on the IT8661F Super I/O chip. */
 static void it8661f_enable_serial(device_t dev, unsigned iobase)
 {
 	uint8_t i;
@@ -88,10 +88,10 @@ static void it8661f_enable_serial(device_t dev, unsigned iobase)
 	it8661f_sio_write(IT8661F_IR,   0x30, 0x1); /* IR */
 
 	/* Select 24MHz CLKIN (clear bit 1) and clear software suspend mode
-           (clear bit 0). */
+	   (clear bit 0). */
 	it8661f_sio_write(0x00, IT8661F_CONFIG_REG_SWSUSP, 0x00);
 
 	/* (3) Exit the configuration state (MB PnP mode). */
-	it8661f_sio_write(0x00, IT8661F_CONFIG_REG_CC, 0x02); 
+	it8661f_sio_write(0x00, IT8661F_CONFIG_REG_CC, 0x02);
 }