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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-07-09 20:26:25 +1000
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-10-27 12:50:33 +0100
commit85836c2215498ff18746b3a7e85ed684cf2e119e (patch)
tree1b774a8f00fda2e0ccc1939105e5f4f2c7c8abe3 /src/superio/ite/it8661f
parent377fd754932922e8c907994ef3e4d8ab925c6132 (diff)
downloadcoreboot-85836c2215498ff18746b3a7e85ed684cf2e119e.tar.xz
superio: Use 'pnp_devfn_t' over 'device_t' in romstage component
The romstage component of Super I/O support is in fact written around passing a lower and upper half packed integer. We currently have two typedef's for this, 'device_t' and 'pnp_devfn_t'. We wish to make use of 'pnp_devfn_t' over 'device_t' as 'device_t' changes it's typedef in the ramstage context and so is really a conflicting definition. This helps solve problems down the road to having the 'real' 'device_t' definition usable in romstage later. This follows on from the rational given in: c2956e7 device/pci_early.c: Mixes up variants of a typedefs to 'u32' Change-Id: Ia9f238ebb944f9fe7b274621ee0c09a6de288a76 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6231 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/superio/ite/it8661f')
-rw-r--r--src/superio/ite/it8661f/early_serial.c10
-rw-r--r--src/superio/ite/it8661f/it8661f.h2
2 files changed, 6 insertions, 6 deletions
diff --git a/src/superio/ite/it8661f/early_serial.c b/src/superio/ite/it8661f/early_serial.c
index 7373f71975..19d60b1eb8 100644
--- a/src/superio/ite/it8661f/early_serial.c
+++ b/src/superio/ite/it8661f/early_serial.c
@@ -26,7 +26,7 @@
/* Base address 0x3f0: 0x86 0x80 0x55 0x55. */
/* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */
/* Base address 0x370: 0x86 0x80 0xaa 0x55. */
-static void pnp_enter_ext_func_mode(device_t dev)
+static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
{
int i;
u16 port = dev >> 8;
@@ -42,7 +42,7 @@ static void pnp_enter_ext_func_mode(device_t dev)
outb(init_values[i], port);
}
-static void pnp_exit_ext_func_mode(device_t dev)
+static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
{
pnp_write_config(dev, IT8661F_REG_CC, (1 << 1));
}
@@ -55,21 +55,21 @@ static void pnp_exit_ext_func_mode(device_t dev)
*
* Bits: FDC (0), Com1 (1), Com2 (2), PP (3), IR (4). Bits 5-7 are reserved.
*/
-static void it8661f_enable_logical_devices(device_t dev)
+static void it8661f_enable_logical_devices(pnp_devfn_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_write_config(dev, IT8661F_REG_LDE, 0x1f);
pnp_exit_ext_func_mode(dev);
}
-static void it8661f_set_clkin(device_t dev, u8 clkin)
+static void it8661f_set_clkin(pnp_devfn_t dev, u8 clkin)
{
pnp_enter_ext_func_mode(dev);
pnp_write_config(dev, IT8661F_REG_SWSUSP, (clkin << 1));
pnp_exit_ext_func_mode(dev);
}
-void it8661f_enable_serial(device_t dev, u16 iobase)
+void it8661f_enable_serial(pnp_devfn_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);
diff --git a/src/superio/ite/it8661f/it8661f.h b/src/superio/ite/it8661f/it8661f.h
index 045a54c46c..297dea3d21 100644
--- a/src/superio/ite/it8661f/it8661f.h
+++ b/src/superio/ite/it8661f/it8661f.h
@@ -52,6 +52,6 @@ static const u8 init_values[] = {
0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39,
};
-void it8661f_enable_serial(device_t dev, u16 iobase);
+void it8661f_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_ITE_IT8661F_H */