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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2006-11-04 23:19:00 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2006-11-04 23:19:00 +0000 |
| commit | 1549f2a557058000d65d913ffb8b60487bdc09ab (patch) | |
| tree | 76b682c4c85aa73f281c3fe154400c3bdd9e893d /src/superio/ite/it8671f | |
| parent | faea4c59abb37c80b530df0b5901eb3a89fb2dea (diff) | |
| download | coreboot-1549f2a557058000d65d913ffb8b60487bdc09ab.tar.xz | |
Various minor cosmetic changes in the ITE Super I/Os, mostly whitespace
changes and fixing of comments.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/ite/it8671f')
| -rw-r--r-- | src/superio/ite/it8671f/Config.lb | 1 | ||||
| -rw-r--r-- | src/superio/ite/it8671f/it8671f_early_serial.c | 12 |
2 files changed, 7 insertions, 6 deletions
diff --git a/src/superio/ite/it8671f/Config.lb b/src/superio/ite/it8671f/Config.lb index 6a4d526a7c..a03c28b1c8 100644 --- a/src/superio/ite/it8671f/Config.lb +++ b/src/superio/ite/it8671f/Config.lb @@ -20,3 +20,4 @@ config chip.h object superio.o + diff --git a/src/superio/ite/it8671f/it8671f_early_serial.c b/src/superio/ite/it8671f/it8671f_early_serial.c index 1c30ff5723..68cfcd4cac 100644 --- a/src/superio/ite/it8671f/it8671f_early_serial.c +++ b/src/superio/ite/it8671f/it8671f_early_serial.c @@ -26,7 +26,7 @@ #define SIO_INDEX SIO_BASE #define SIO_DATA SIO_BASE+1 -/* Global Configuration Registers. */ +/* Global configuration registers. */ #define IT8671F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ #define IT8671F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ #define IT8671F_CONFIG_REG_LDE 0x23 /* PnP Logical Device Enable. */ @@ -35,7 +35,7 @@ #define IT8671F_CONFIGURATION_PORT 0x0279 /* Write-only. */ /* Special values used for entering MB PnP mode. The first four bytes of - * each line determine the address port, the last four are data. */ + each line determine the address port, the last four are data. */ static const uint8_t init_values[] = { 0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61, @@ -44,7 +44,7 @@ static const uint8_t init_values[] = { }; /* The content of IT8671F_CONFIG_REG_LDN (index 0x07) must be set to the - * LDN the register belongs to, before you can access the register. */ + LDN the register belongs to, before you can access the register. */ static void it8671f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) { outb(IT8671F_CONFIG_REG_LDN, SIO_BASE); @@ -53,7 +53,7 @@ static void it8671f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) outb(value, SIO_DATA); } -/* Enable the peripheral devices on the IT8671F Super IO chip. */ +/* Enable the peripheral devices on the IT8671F Super I/O chip. */ static void it8671f_enable_serial(device_t dev, unsigned iobase) { uint8_t i; @@ -80,7 +80,7 @@ static void it8671f_enable_serial(device_t dev, unsigned iobase) PP (3), Reserved (4), KBCK (5), KBCM (6), Reserved (7). */ it8671f_sio_write(0x00, IT8671F_CONFIG_REG_LDE, 0x6f); - /* Activate all devices. */ + /* Activate all devices. */ it8671f_sio_write(IT8671F_FDC, 0x30, 0x01); /* Floppy */ it8671f_sio_write(IT8671F_SP1, 0x30, 0x01); /* Serial port 1 */ it8671f_sio_write(IT8671F_SP2, 0x30, 0x01); /* Serial port 2 */ @@ -93,6 +93,6 @@ static void it8671f_enable_serial(device_t dev, unsigned iobase) it8671f_sio_write(0x00, IT8671F_CONFIG_REG_SWSUSP, 0x00); /* (3) Exit the configuration state (MB PnP mode). */ - it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02); + it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02); } |