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authorUwe Hermann <uwe@hermann-uwe.de>2006-11-04 23:19:00 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2006-11-04 23:19:00 +0000
commit1549f2a557058000d65d913ffb8b60487bdc09ab (patch)
tree76b682c4c85aa73f281c3fe154400c3bdd9e893d /src/superio/ite/it8673f
parentfaea4c59abb37c80b530df0b5901eb3a89fb2dea (diff)
downloadcoreboot-1549f2a557058000d65d913ffb8b60487bdc09ab.tar.xz
Various minor cosmetic changes in the ITE Super I/Os, mostly whitespace
changes and fixing of comments. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/ite/it8673f')
-rw-r--r--src/superio/ite/it8673f/Config.lb1
-rw-r--r--src/superio/ite/it8673f/it8673f.h2
-rw-r--r--src/superio/ite/it8673f/it8673f_early_serial.c10
3 files changed, 7 insertions, 6 deletions
diff --git a/src/superio/ite/it8673f/Config.lb b/src/superio/ite/it8673f/Config.lb
index 6a4d526a7c..a03c28b1c8 100644
--- a/src/superio/ite/it8673f/Config.lb
+++ b/src/superio/ite/it8673f/Config.lb
@@ -20,3 +20,4 @@
config chip.h
object superio.o
+
diff --git a/src/superio/ite/it8673f/it8673f.h b/src/superio/ite/it8673f/it8673f.h
index d3e577ec15..8513a18282 100644
--- a/src/superio/ite/it8673f/it8673f.h
+++ b/src/superio/ite/it8673f/it8673f.h
@@ -19,7 +19,7 @@
*/
/* Datasheet: http://www.datasheet4u.com/html/I/T/8/IT8673F_ITE.pdf.html */
-/* Status: untested on real hardware, but it compiles. */
+/* Status: Untested on real hardware, but it compiles. */
#define IT8673F_FDC 0x00 /* Floppy */
#define IT8673F_SP1 0x01 /* Com1 */
diff --git a/src/superio/ite/it8673f/it8673f_early_serial.c b/src/superio/ite/it8673f/it8673f_early_serial.c
index 3047a76299..3c8c492149 100644
--- a/src/superio/ite/it8673f/it8673f_early_serial.c
+++ b/src/superio/ite/it8673f/it8673f_early_serial.c
@@ -26,7 +26,7 @@
#define SIO_INDEX SIO_BASE
#define SIO_DATA SIO_BASE+1
-/* Global Configuration Registers. */
+/* Global configuration registers. */
#define IT8673F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
#define IT8673F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
#define IT8673F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
@@ -35,7 +35,7 @@
#define IT8673F_CONFIGURATION_PORT 0x0279 /* Write-only. */
/* Special values used for entering MB PnP mode. The first four bytes of
- * each line determine the address port, the last four are data. */
+ each line determine the address port, the last four are data. */
static const uint8_t init_values[] = {
0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe,
0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61,
@@ -44,7 +44,7 @@ static const uint8_t init_values[] = {
};
/* The content of IT8673F_CONFIG_REG_LDN (index 0x07) must be set to the
- * LDN the register belongs to, before you can access the register. */
+ LDN the register belongs to, before you can access the register. */
static void it8673f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
{
outb(IT8673F_CONFIG_REG_LDN, SIO_BASE);
@@ -53,7 +53,7 @@ static void it8673f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
outb(value, SIO_DATA);
}
-/* Enable the peripheral devices on the IT8673F Super IO chip. */
+/* Enable the peripheral devices on the IT8673F Super I/O chip. */
static void it8673f_enable_serial(device_t dev, unsigned iobase)
{
uint8_t i;
@@ -92,6 +92,6 @@ static void it8673f_enable_serial(device_t dev, unsigned iobase)
it8673f_sio_write(0x00, IT8673F_CONFIG_REG_SWSUSP, 0x00);
/* (3) Exit the configuration state (MB PnP mode). */
- it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CC, 0x02);
+ it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CC, 0x02);
}