Random ITE Super I/O fixes.

 - Drop some of the less useful / outdated / duplicated comments.

 - Simplify and streamline some code to look like the other Super I/Os.

 - Use u8/16/etc. everywhere.

 - ITE IT8718F: Add missing GPIO LDN.
 
 - Add missing braces around SIO_DATA #defines, potential bug even.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6047 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 19 insertions, 26 deletions

diff --git a/src/superio/ite/it8705f/Makefile.inc b/src/superio/ite/it8705f/Makefile.inc
index 1aa83fcfc4..9d0871c722 100644
--- a/src/superio/ite/it8705f/Makefile.inc
+++ b/src/superio/ite/it8705f/Makefile.inc
@@ -18,5 +18,5 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-#config chip.h
 ramstage-$(CONFIG_SUPERIO_ITE_IT8705F) += superio.c
+
diff --git a/src/superio/ite/it8705f/chip.h b/src/superio/ite/it8705f/chip.h
index 7702247ed9..0697ac77b4 100644
--- a/src/superio/ite/it8705f/chip.h
+++ b/src/superio/ite/it8705f/chip.h
@@ -18,10 +18,10 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#ifndef _SUPERIO_ITE_IT8705F
-#define _SUPERIO_ITE_IT8705F
+#ifndef SUPERIO_ITE_IT8705F_CHIP_H
+#define SUPERIO_ITE_IT8705F_CHIP_H
 
-/* This chip doesn't seem to have keyboard and mouse support. */
+/* This chip doesn't have keyboard and mouse support. */
 
 #include <device/device.h>
 #include <uart8250.h>
@@ -32,4 +32,4 @@ struct superio_ite_it8705f_config {
 	struct uart8250 com1, com2;
 };
 
-#endif /* _SUPERIO_ITE_IT8705F */
+#endif
diff --git a/src/superio/ite/it8705f/it8705f.h b/src/superio/ite/it8705f/it8705f.h
index 68172d5aec..c2a8e76a32 100644
--- a/src/superio/ite/it8705f/it8705f.h
+++ b/src/superio/ite/it8705f/it8705f.h
@@ -19,10 +19,8 @@
  */
 
 /* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8705_2.asp */
-/* Status: Untested on real hardware, but it compiles. */
-/* Note: This should also work on an IT8705AF, they're almost the same. */
 
-/* This chip doesn't seem to have keyboard and mouse support. */
+/* Note: This should also work on an IT8705AF, they're almost the same. */
 
 #define IT8705F_FDC  0x00 /* Floppy */
 #define IT8705F_SP1  0x01 /* Com1 */
diff --git a/src/superio/ite/it8705f/it8705f_early_serial.c b/src/superio/ite/it8705f/it8705f_early_serial.c
index 8930d1b8df..7971582f9d 100644
--- a/src/superio/ite/it8705f/it8705f_early_serial.c
+++ b/src/superio/ite/it8705f/it8705f_early_serial.c
@@ -24,7 +24,7 @@
 /* The base address is 0x2e or 0x4e, depending on config bytes. */
 #define SIO_BASE                     0x2e
 #define SIO_INDEX                    SIO_BASE
-#define SIO_DATA                     SIO_BASE+1
+#define SIO_DATA                     (SIO_BASE + 1)
 
 /* Global configuration registers. */
 #define IT8705F_CONFIG_REG_CC        0x02 /* Configure Control (write-only). */
@@ -37,9 +37,7 @@
 
 #define IT8705F_CONFIGURATION_PORT   0x2e /* Write-only. */
 
-/* The content of IT8705F_CONFIG_REG_LDN (index 0x07) must be set to the
-   LDN the register belongs to, before you can access the register. */
-static void it8705f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
+static void it8705f_sio_write(u8 ldn, u8 index, u8 value)
 {
 	outb(IT8705F_CONFIG_REG_LDN, SIO_BASE);
 	outb(ldn, SIO_DATA);
@@ -47,8 +45,8 @@ static void it8705f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
 	outb(value, SIO_DATA);
 }
 
-/* Enable the peripheral devices on the IT8705F Super I/O chip. */
-static void it8705f_enable_serial(device_t dev, unsigned iobase)
+/* Enable the serial port(s). */
+static void it8705f_enable_serial(device_t dev, u16 iobase)
 {
 	/* (1) Enter the configuration state (MB PnP mode). */
 
@@ -62,14 +60,16 @@ static void it8705f_enable_serial(device_t dev, unsigned iobase)
 
 	/* (2) Modify the data of configuration registers. */
 
-	/* Select the chip to configure (if there's more than one).
-	   Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
-	   If this register is not written, both chips are configured. */
+	/*
+	 * Select the chip to configure (if there's more than one).
+	 * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
+	 * If this register is not written, both chips are configured.
+	 */
 	/* it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CONFIGSEL, 0x00); */
 
 	/* Enable serial port(s). */
-	it8705f_sio_write(IT8705F_SP1,  0x30, 0x1); /* Serial port 1 */
-	it8705f_sio_write(IT8705F_SP2,  0x30, 0x1); /* Serial port 2 */
+	it8705f_sio_write(IT8705F_SP1, 0x30, 0x1); /* Serial port 1 */
+	it8705f_sio_write(IT8705F_SP2, 0x30, 0x1); /* Serial port 2 */
 
 	/* Select 24MHz CLKIN (set bit 0). */
 	it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CLOCKSEL, 0x01);
diff --git a/src/superio/ite/it8705f/superio.c b/src/superio/ite/it8705f/superio.c
index 27f66c3bf5..04cdd29083 100644
--- a/src/superio/ite/it8705f/superio.c
+++ b/src/superio/ite/it8705f/superio.c
@@ -18,8 +18,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* This chip doesn't seem to have keyboard and mouse support. */
-
 #include <device/device.h>
 #include <device/pnp.h>
 #include <uart8250.h>
@@ -29,14 +27,11 @@
 
 static void init(device_t dev)
 {
-	struct superio_ite_it8705f_config *conf;
+	struct superio_ite_it8705f_config *conf = dev->chip_info;
 	struct resource *res0, *res1;
 
-	if (!dev->enabled) {
+	if (!dev->enabled)
 		return;
-	}
-
-	conf = dev->chip_info;
 
 	switch (dev->path.pnp.device) {
 	case IT8705F_FDC: /* TODO. */