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authorUwe Hermann <uwe@hermann-uwe.de>2007-04-02 16:57:32 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-04-02 16:57:32 +0000
commit23d1e35d4d2fd25c710c5b54bfe171d8d2db0cea (patch)
tree8b180cda2a8eafc38ee2d2895392cf218e5b0761 /src/superio/ite/it8712f
parentcbef76ecf3b991a17549f36b09e73d0a103e6f13 (diff)
downloadcoreboot-23d1e35d4d2fd25c710c5b54bfe171d8d2db0cea.tar.xz
The *_early_serial.c pre-RAM code should do just that -- enable the serial
port(s), and nothing else. The code in superio.c will initialize the rest when RAM is available... Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/ite/it8712f')
-rw-r--r--src/superio/ite/it8712f/it8712f_early_serial.c10
1 files changed, 1 insertions, 9 deletions
diff --git a/src/superio/ite/it8712f/it8712f_early_serial.c b/src/superio/ite/it8712f/it8712f_early_serial.c
index 516581a903..d9739c5f01 100644
--- a/src/superio/ite/it8712f/it8712f_early_serial.c
+++ b/src/superio/ite/it8712f/it8712f_early_serial.c
@@ -65,17 +65,9 @@ static void it8712f_enable_serial(device_t dev, unsigned iobase)
If this register is not written, both chips are configured. */
/* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CONFIGSEL, 0x00); */
- /* Enable all devices. */
- it8712f_sio_write(IT8712F_FDC, 0x30, 0x1); /* Floppy */
+ /* Enable serial port(s). */
it8712f_sio_write(IT8712F_SP1, 0x30, 0x1); /* Serial port 1 */
it8712f_sio_write(IT8712F_SP2, 0x30, 0x1); /* Serial port 2 */
- it8712f_sio_write(IT8712F_PP, 0x30, 0x1); /* Parallel port */
- it8712f_sio_write(IT8712F_EC, 0x30, 0x1); /* Environment controller */
- it8712f_sio_write(IT8712F_KBCK, 0x30, 0x1); /* Keyboard */
- it8712f_sio_write(IT8712F_KBCM, 0x30, 0x1); /* Mouse */
- it8712f_sio_write(IT8712F_MIDI, 0x30, 0x1); /* MIDI port */
- it8712f_sio_write(IT8712F_GAME, 0x30, 0x1); /* GAME port */
- it8712f_sio_write(IT8712F_IR, 0x30, 0x1); /* Consumer IR */
/* Select 24MHz CLKIN (set bit 0). */
it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CLOCKSEL, 0x01);