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| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-04-27 00:41:50 +1000 |
|---|---|---|
| committer | Rudolf Marek <r.marek@assembler.cz> | 2014-05-11 17:52:08 +0200 |
| commit | f29200240e428761827ab8d179fa23068bfa9d59 (patch) | |
| tree | e8f20cf76e224a08152c46196894479bd6105436 /src/superio/ite/it8728f/it8728f.h | |
| parent | 946bee1c349db6bf88b4f6736dc910eb4890a74b (diff) | |
| download | coreboot-f29200240e428761827ab8d179fa23068bfa9d59.tar.xz | |
superio/ite/*: Factor out generic romstage component
Following the reasoning of:
cf7b498 superio/fintek/*: Factor out generic romstage component
Change-Id: I4c0a9a5a7786eb8fcb0c3ed6251c7fe9bbbadae7
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5585
Tested-by: build bot (Jenkins)
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Diffstat (limited to 'src/superio/ite/it8728f/it8728f.h')
| -rw-r--r-- | src/superio/ite/it8728f/it8728f.h | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/src/superio/ite/it8728f/it8728f.h b/src/superio/ite/it8728f/it8728f.h index 55bdf697bc..8a7e8b2e71 100644 --- a/src/superio/ite/it8728f/it8728f.h +++ b/src/superio/ite/it8728f/it8728f.h @@ -39,16 +39,4 @@ #define IT8728F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */ #define IT8728F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. 'Special register' */ -/* - * Superio low level commands - * Pass dev = PNP_DEV(superiobase, LDN) - */ -void it8728f_reg_write(device_t dev, u8 index, u8 value); - -/* Select 24MHz CLKIN (48MHz default). */ -void it8728f_24mhz_clkin(device_t dev); - -/* Enable the serial port(s). */ -void it8728f_enable_serial(device_t dev, u16 iobase); - #endif /* SUPERIO_ITE_IT8728F_H */ |