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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-15 19:35:14 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-15 19:35:14 +0000
commita69d978be8a068944466e776de87527fb104a878 (patch)
tree8acf4247e3104ad9ccb940568a81e472105a674b /src/superio/nsc/pc8374
parent2e9323e5bef293c051d9fd982214e6db2e3305ee (diff)
downloadcoreboot-a69d978be8a068944466e776de87527fb104a878.tar.xz
C and other Super I/O cosmetic fixes.
- Random coding style, whitespace and cosmetic fixes. - Consistently use the same spacing and 4-hexdigit port number format in the pnp_dev_info[] arrays. - Drop dead/unused code and less useful comments. - Add missing "(C)" characters and copyright years. - Shorten and simplify some code snippets. - Use u8/u16/etc. everywhere. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/nsc/pc8374')
-rw-r--r--src/superio/nsc/pc8374/Makefile.inc2
-rw-r--r--src/superio/nsc/pc8374/pc8374_early_init.c23
-rw-r--r--src/superio/nsc/pc8374/superio.c30
3 files changed, 26 insertions, 29 deletions
diff --git a/src/superio/nsc/pc8374/Makefile.inc b/src/superio/nsc/pc8374/Makefile.inc
index 9d88cf6761..5de252b6a9 100644
--- a/src/superio/nsc/pc8374/Makefile.inc
+++ b/src/superio/nsc/pc8374/Makefile.inc
@@ -19,5 +19,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-#config chip.h
ramstage-$(CONFIG_SUPERIO_NSC_PC8374) += superio.c
+
diff --git a/src/superio/nsc/pc8374/pc8374_early_init.c b/src/superio/nsc/pc8374/pc8374_early_init.c
index ac73b26602..29b57e43a9 100644
--- a/src/superio/nsc/pc8374/pc8374_early_init.c
+++ b/src/superio/nsc/pc8374/pc8374_early_init.c
@@ -22,30 +22,31 @@
#include <arch/romcc_io.h>
#include "pc8374.h"
-/* things that Must Be Done to get this chip working */
-/* Straight from the data book */
-static void pc8374_enable(unsigned iobase, u8 *init)
+static void pc8374_enable(u16 iobase, u8 *init)
{
u8 val, count;
+
outb(0x29, iobase);
- val = inb(iobase+1);
+ val = inb(iobase + 1);
val |= 0x91;
- outb(val, iobase+1);
- for(count = 0; count < 255; count++)
- if (inb(iobase+1) == 0x91)
+ outb(val, iobase + 1);
+
+ for (count = 0; count < 255; count++)
+ if (inb(iobase + 1) == 0x91)
break;
- for(;*init; init++) {
+
+ for (; *init; init++) {
outb(*init, iobase);
- val = inb(iobase+1);
+ val = inb(iobase + 1);
init++;
val &= *init;
init++;
val |= *init;
- outb(val, iobase+1);
+ outb(val, iobase + 1);
}
}
-static void pc8374_enable_dev(device_t dev, unsigned iobase)
+static void pc8374_enable_dev(device_t dev, u16 iobase)
{
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
diff --git a/src/superio/nsc/pc8374/superio.c b/src/superio/nsc/pc8374/superio.c
index 189c2d1dbf..247aae913e 100644
--- a/src/superio/nsc/pc8374/superio.c
+++ b/src/superio/nsc/pc8374/superio.c
@@ -33,15 +33,12 @@
static void init(device_t dev)
{
- struct superio_nsc_pc8374_config *conf;
+ struct superio_nsc_pc8374_config *conf = dev­>chip_info;
struct resource *res0;
- /* Wishlist handle well known programming interfaces more
- * generically.
- */
- if (!dev->enabled) {
+
+ if (!dev->enabled)
return;
- }
- conf = dev->chip_info;
+
switch(dev->path.pnp.device) {
case PC8374_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
@@ -66,20 +63,19 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
- { &ops, PC8374_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
- { &ops, PC8374_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
- { &ops, PC8374_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
- { &ops, PC8374_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, PC8374_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
- { &ops, PC8374_KBCM, PNP_IRQ0 },
- { &ops, PC8374_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
- { &ops, PC8374_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC8374_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07fa, 0}, },
+ { &ops, PC8374_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x04f8, 0}, },
+ { &ops, PC8374_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x07f8, 0}, },
+ { &ops, PC8374_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, PC8374_SWC, PNP_IO0 | PNP_IRQ0, {0xfff0, 0}, },
+ { &ops, PC8374_KBCM, PNP_IRQ0, },
+ { &ops, PC8374_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
+ { &ops, PC8374_GPIO, PNP_IO0 | PNP_IRQ0, {0xfff8, 0}, },
};
static void enable_dev(struct device *dev)
{
- pnp_enable_devices(dev, &ops,
- ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+ pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_nsc_pc8374_ops = {