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| author | Rob Barnes <robbarnes@google.com> | 2020-01-30 10:54:28 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-09-17 12:35:56 +0000 |
| commit | 28cb14bf133f63f9451610348f9a84370c4b3c59 (patch) | |
| tree | 69e74d71272944100a0e5e3ad1ac87d7f053210e /src/superio/nsc/pc87417 | |
| parent | 60795784b7ecca79572c86715b6dfd6d41ae2055 (diff) | |
| download | coreboot-28cb14bf133f63f9451610348f9a84370c4b3c59.tar.xz | |
soc/amd/picasso: Clean up legacy UART config
Clean up configuration of the legacy UART and add Kconfig options for
the mapping between UART and legacy I/O decode.
BUG=b:143283592
BUG=b:153675918
TEST=Linux detects an additional legacy serial port for each active MMIO
one if PICASSO_UART_LEGACY is selected.
BRANCH=zork
Signed-off-by: Rob Barnes <robbarnes@google.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id08ff6428d4019303ebb6e44e13aba480cf1fde2
Reviewed-on: https://chromium-review.googlesource.com/2037891
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40322
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/superio/nsc/pc87417')
0 files changed, 0 insertions, 0 deletions