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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-15 19:35:14 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-15 19:35:14 +0000
commita69d978be8a068944466e776de87527fb104a878 (patch)
tree8acf4247e3104ad9ccb940568a81e472105a674b /src/superio/nsc/pc87427
parent2e9323e5bef293c051d9fd982214e6db2e3305ee (diff)
downloadcoreboot-a69d978be8a068944466e776de87527fb104a878.tar.xz
C and other Super I/O cosmetic fixes.
- Random coding style, whitespace and cosmetic fixes. - Consistently use the same spacing and 4-hexdigit port number format in the pnp_dev_info[] arrays. - Drop dead/unused code and less useful comments. - Add missing "(C)" characters and copyright years. - Shorten and simplify some code snippets. - Use u8/u16/etc. everywhere. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/nsc/pc87427')
-rw-r--r--src/superio/nsc/pc87427/Makefile.inc2
-rw-r--r--src/superio/nsc/pc87427/pc87427_early_init.c22
-rw-r--r--src/superio/nsc/pc87427/superio.c39
3 files changed, 30 insertions, 33 deletions
diff --git a/src/superio/nsc/pc87427/Makefile.inc b/src/superio/nsc/pc87427/Makefile.inc
index 9b03a255b1..4c104d3dd0 100644
--- a/src/superio/nsc/pc87427/Makefile.inc
+++ b/src/superio/nsc/pc87427/Makefile.inc
@@ -19,5 +19,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-#config chip.h
ramstage-$(CONFIG_SUPERIO_NSC_PC87427) += superio.c
+
diff --git a/src/superio/nsc/pc87427/pc87427_early_init.c b/src/superio/nsc/pc87427/pc87427_early_init.c
index bbb140d57c..8c1f47d161 100644
--- a/src/superio/nsc/pc87427/pc87427_early_init.c
+++ b/src/superio/nsc/pc87427/pc87427_early_init.c
@@ -27,26 +27,28 @@ static void pc87427_disable_dev(device_t dev)
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
}
-static void pc87427_enable_dev(device_t dev, unsigned iobase)
+
+static void pc87427_enable_dev(device_t dev, u16 iobase)
{
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
}
+
static void xbus_cfg(device_t dev)
{
- uint8_t i, data;
- uint16_t xbus_index;
+ u8 i, data;
+ u16 xbus_index;
pnp_set_logical_device(dev);
- /* select proper BIOS size (4MB) */
- pnp_write_config(dev, PC87427_XMEMCNF2, (pnp_read_config(dev, PC87427_XMEMCNF2)) | 0x04);
+
+ /* Select proper BIOS size (4MB). */
+ pnp_write_config(dev, PC87427_XMEMCNF2,
+ (pnp_read_config(dev, PC87427_XMEMCNF2)) | 0x04);
xbus_index = pnp_read_iobase(dev, 0x60);
- /* enable writes to devices attached to XCS0 (XBUS Chip Select 0) */
- for (i=0; i<= 0xf; i++) {
- outb((i<<4), xbus_index + PC87427_HAP0);
- }
- return;
+ /* Enable writes to devices attached to XCS0 (XBUS Chip Select 0). */
+ for (i = 0; i <= 0xf; i++)
+ outb((i << 4), xbus_index + PC87427_HAP0);
}
diff --git a/src/superio/nsc/pc87427/superio.c b/src/superio/nsc/pc87427/superio.c
index 82efb3c4ee..088fd0aa6f 100644
--- a/src/superio/nsc/pc87427/superio.c
+++ b/src/superio/nsc/pc87427/superio.c
@@ -31,15 +31,12 @@
static void init(device_t dev)
{
- struct superio_nsc_pc87427_config *conf;
+ struct superio_nsc_pc87427_config *conf = dev->chip_info;
struct resource *res0;
- /* Wishlist handle well known programming interfaces more
- * generically.
- */
- if (!dev->enabled) {
+
+ if (!dev->enabled)
return;
- }
- conf = dev->chip_info;
+
switch(dev->path.pnp.device) {
case PC87427_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
@@ -64,25 +61,23 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
- { &ops, PC87427_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
- { &ops, PC87427_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, PC87427_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, PC87427_SWC, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0,
- { 0xfff0, 0 }, { 0xfffc, 0 }, { 0xfffc, 0 }, { 0xfff8, 0 } },
- { &ops, PC87427_KBCM, PNP_IRQ0 },
- { &ops, PC87427_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
- { &ops, PC87427_GPIO, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
- { &ops, PC87427_WDT, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 } },
- { &ops, PC87427_FMC, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
- { &ops, PC87427_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
- { &ops, PC87427_RTC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xfffe, 0 }, { 0xfffe, 0 } },
- { &ops, PC87427_MHC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffe0, 0 }, { 0xffe0, 0 } },
+ { &ops, PC87427_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07fa, 0}, },
+ { &ops, PC87427_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, PC87427_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, PC87427_SWC, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0, {0xfff0, 0}, {0xfffc, 0}, {0xfffc, 0}, {0xfff8, 0}, },
+ { &ops, PC87427_KBCM, PNP_IRQ0, },
+ { &ops, PC87427_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x07f8, 0}, {0x07f8, 4}, },
+ { &ops, PC87427_GPIO, PNP_IO0 | PNP_IRQ0, {0xffe0, 0}, },
+ { &ops, PC87427_WDT, PNP_IO0 | PNP_IRQ0, {0xfff0, 0}, },
+ { &ops, PC87427_FMC, PNP_IO0 | PNP_IRQ0, {0xffe0, 0}, },
+ { &ops, PC87427_XBUS, PNP_IO0 | PNP_IRQ0, {0xffe0, 0}, },
+ { &ops, PC87427_RTC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xfffe, 0}, {0xfffe, 0}, },
+ { &ops, PC87427_MHC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0xffe0, 0}, {0xffe0, 0}, },
};
static void enable_dev(struct device *dev)
{
- pnp_enable_devices(dev, &ops,
- ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+ pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_nsc_pc87427_ops = {