Rename src/superio/NSC to src/superio/nsc.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2473 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

40 files changed, 1155 insertions, 0 deletions

diff --git a/src/superio/nsc/pc8374/Config.lb b/src/superio/nsc/pc8374/Config.lb
new file mode 100644
index 0000000000..f62a567d61
--- /dev/null
+++ b/src/superio/nsc/pc8374/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.o
diff --git a/src/superio/nsc/pc8374/chip.h b/src/superio/nsc/pc8374/chip.h
new file mode 100644
index 0000000000..7bfa0db101
--- /dev/null
+++ b/src/superio/nsc/pc8374/chip.h
@@ -0,0 +1,10 @@
+struct chip_operations;
+extern struct chip_operations superio_nsc_pc8374_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_nsc_pc8374_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};
diff --git a/src/superio/nsc/pc8374/pc8374.h b/src/superio/nsc/pc8374/pc8374.h
new file mode 100644
index 0000000000..1f166a70fe
--- /dev/null
+++ b/src/superio/nsc/pc8374/pc8374.h
@@ -0,0 +1,9 @@
+#define PC8374_FDC  0x00 /* Floppy */
+#define PC8374_PP   0x01 /* Parallel port */
+#define PC8374_SP2  0x02 /* Com2 */
+#define PC8374_SP1  0x03 /* Com1 */
+#define PC8374_SWC  0x04
+#define PC8374_KBCM 0x05 /* Mouse */
+#define PC8374_KBCK 0x06 /* Keyboard */
+#define PC8374_GPIO 0x07
+#define PC8374_HM  0x08
diff --git a/src/superio/nsc/pc8374/pc8374_early_serial.c b/src/superio/nsc/pc8374/pc8374_early_serial.c
new file mode 100644
index 0000000000..be496070ec
--- /dev/null
+++ b/src/superio/nsc/pc8374/pc8374_early_serial.c
@@ -0,0 +1,11 @@
+#include <arch/romcc_io.h>
+#include "pc8374.h"
+
+
+static void pc8374_enable_serial(device_t dev, unsigned iobase)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 1);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}
diff --git a/src/superio/nsc/pc8374/superio.c b/src/superio/nsc/pc8374/superio.c
new file mode 100644
index 0000000000..1ef3d29da3
--- /dev/null
+++ b/src/superio/nsc/pc8374/superio.c
@@ -0,0 +1,73 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* Copyright 2003-2004 Linux Networx */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <string.h>
+#include <bitops.h>
+#include <uart8250.h>
+#include <pc80/keyboard.h>
+#include "chip.h"
+#include "pc8374.h"
+
+static void init(device_t dev)
+{
+	struct superio_nsc_pc8374_config *conf;
+	struct resource *res0, *res1;
+	/* Wishlist handle well known programming interfaces more
+	 * generically.
+	 */
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case PC8374_SP1: 
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+	case PC8374_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+	case PC8374_KBCK:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC8374_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
+ { &ops, PC8374_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
+ { &ops, PC8374_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
+ { &ops, PC8374_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, PC8374_SWC,  PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
+ { &ops, PC8374_KBCM, PNP_IRQ0 },
+ { &ops, PC8374_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
+ { &ops, PC8374_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+};
+
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &ops,
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_nsc_pc8374_ops = {
+	CHIP_NAME("NSC 8374")
+	.enable_dev = enable_dev,
+};
diff --git a/src/superio/nsc/pc87351/Config.lb b/src/superio/nsc/pc87351/Config.lb
new file mode 100644
index 0000000000..f62a567d61
--- /dev/null
+++ b/src/superio/nsc/pc87351/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.o
diff --git a/src/superio/nsc/pc87351/chip.h b/src/superio/nsc/pc87351/chip.h
new file mode 100644
index 0000000000..05a02a2565
--- /dev/null
+++ b/src/superio/nsc/pc87351/chip.h
@@ -0,0 +1,10 @@
+struct chip_operations;
+extern struct chip_operations superio_nsc_pc87351_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_nsc_pc87351_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};
diff --git a/src/superio/nsc/pc87351/pc87351.h b/src/superio/nsc/pc87351/pc87351.h
new file mode 100644
index 0000000000..dbed582bce
--- /dev/null
+++ b/src/superio/nsc/pc87351/pc87351.h
@@ -0,0 +1,9 @@
+#define PC87351_FDC  0x00 /* Floppy */
+#define PC87351_PP   0x01 /* Parallel port */
+#define PC87351_SP2  0x02 /* Com2 */
+#define PC87351_SP1  0x03 /* Com1 */
+#define PC87351_SWC  0x04 /* System wakeup control */
+#define PC87351_KBCM 0x05 /* Mouse */
+#define PC87351_KBCK 0x06 /* Keyboard */
+#define PC87351_GPIO 0x07 /* General purpose IO */
+#define PC87351_FSD  0x08 /* Fan speed device */
diff --git a/src/superio/nsc/pc87351/pc87351_early_serial.c b/src/superio/nsc/pc87351/pc87351_early_serial.c
new file mode 100644
index 0000000000..7ec361e853
--- /dev/null
+++ b/src/superio/nsc/pc87351/pc87351_early_serial.c
@@ -0,0 +1,10 @@
+#include <arch/romcc_io.h>
+#include "pc87351.h"
+
+static void pc87351_enable_serial(device_t dev, unsigned iobase)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}
diff --git a/src/superio/nsc/pc87351/superio.c b/src/superio/nsc/pc87351/superio.c
new file mode 100644
index 0000000000..cdc19b2d2d
--- /dev/null
+++ b/src/superio/nsc/pc87351/superio.c
@@ -0,0 +1,80 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* Copyright 2003-2004 Linux Networx */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+/* 
+ * Richard A Smith 
+ * I derived this code from the pc87360 device and removed the stuff the 87351
+ * dosen't do.
+*/
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <string.h>
+#include <bitops.h>
+#include <uart8250.h>
+#include <pc80/keyboard.h>
+#include "chip.h"
+#include "pc87351.h"
+
+static void init(device_t dev)
+{
+	struct superio_nsc_pc87351_config *conf;
+	struct resource *res0, *res1;
+	/* Wishlist handle well known programming interfaces more
+	 * generically.
+	 */
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case PC87351_SP1: 
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+	case PC87351_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+	case PC87351_KBCK:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC87351_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
+ { &ops, PC87351_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
+ { &ops, PC87351_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
+ { &ops, PC87351_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, PC87351_SWC,  PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
+ { &ops, PC87351_KBCM, PNP_IRQ0 },
+ { &ops, PC87351_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
+ { &ops, PC87351_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC87351_FSD,  PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+};
+
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &pnp_ops,
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_nsc_pc87351_ops = {
+	CHIP_NAME("NSC 87351")
+	.enable_dev = enable_dev,
+};
diff --git a/src/superio/nsc/pc87360/Config.lb b/src/superio/nsc/pc87360/Config.lb
new file mode 100644
index 0000000000..f62a567d61
--- /dev/null
+++ b/src/superio/nsc/pc87360/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.o
diff --git a/src/superio/nsc/pc87360/chip.h b/src/superio/nsc/pc87360/chip.h
new file mode 100644
index 0000000000..0d6023b927
--- /dev/null
+++ b/src/superio/nsc/pc87360/chip.h
@@ -0,0 +1,10 @@
+struct chip_operations;
+extern struct chip_operations superio_nsc_pc87360_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_nsc_pc87360_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};
diff --git a/src/superio/nsc/pc87360/pc87360.h b/src/superio/nsc/pc87360/pc87360.h
new file mode 100644
index 0000000000..201da8eb6e
--- /dev/null
+++ b/src/superio/nsc/pc87360/pc87360.h
@@ -0,0 +1,11 @@
+#define PC87360_FDC  0x00 /* Floppy */
+#define PC87360_PP   0x01 /* Parallel port */
+#define PC87360_SP2  0x02 /* Com2 */
+#define PC87360_SP1  0x03 /* Com1 */
+#define PC87360_SWC  0x04
+#define PC87360_KBCM 0x05 /* Mouse */
+#define PC87360_KBCK 0x06 /* Keyboard */
+#define PC87360_GPIO 0x07
+#define PC87360_ACB  0x08
+#define PC87360_FSCM 0x09
+#define PC87360_WDT  0x0A
diff --git a/src/superio/nsc/pc87360/pc87360_early_serial.c b/src/superio/nsc/pc87360/pc87360_early_serial.c
new file mode 100644
index 0000000000..696d3a0570
--- /dev/null
+++ b/src/superio/nsc/pc87360/pc87360_early_serial.c
@@ -0,0 +1,11 @@
+#include <arch/romcc_io.h>
+#include "pc87360.h"
+
+
+static void pc87360_enable_serial(device_t dev, unsigned iobase)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}
diff --git a/src/superio/nsc/pc87360/superio.c b/src/superio/nsc/pc87360/superio.c
new file mode 100644
index 0000000000..2b017d5b73
--- /dev/null
+++ b/src/superio/nsc/pc87360/superio.c
@@ -0,0 +1,76 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* Copyright 2003-2004 Linux Networx */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <string.h>
+#include <bitops.h>
+#include <uart8250.h>
+#include <pc80/keyboard.h>
+#include "chip.h"
+#include "pc87360.h"
+
+static void init(device_t dev)
+{
+	struct superio_nsc_pc87360_config *conf;
+	struct resource *res0, *res1;
+	/* Wishlist handle well known programming interfaces more
+	 * generically.
+	 */
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case PC87360_SP1: 
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+	case PC87360_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+	case PC87360_KBCK:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC87360_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
+ { &ops, PC87360_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
+ { &ops, PC87360_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
+ { &ops, PC87360_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, PC87360_SWC,  PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
+ { &ops, PC87360_KBCM, PNP_IRQ0 },
+ { &ops, PC87360_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
+ { &ops, PC87360_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC87360_ACB,  PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC87360_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC87360_WDT,  PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } },
+};
+
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &ops,
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_nsc_pc87360_ops = {
+	CHIP_NAME("NSC 87360")
+	.enable_dev = enable_dev,
+};
diff --git a/src/superio/nsc/pc87366/Config.lb b/src/superio/nsc/pc87366/Config.lb
new file mode 100644
index 0000000000..f62a567d61
--- /dev/null
+++ b/src/superio/nsc/pc87366/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.o
diff --git a/src/superio/nsc/pc87366/chip.h b/src/superio/nsc/pc87366/chip.h
new file mode 100644
index 0000000000..440885aec8
--- /dev/null
+++ b/src/superio/nsc/pc87366/chip.h
@@ -0,0 +1,9 @@
+extern struct chip_operations superio_nsc_pc87366_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_nsc_pc87366_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};
diff --git a/src/superio/nsc/pc87366/pc87366.h b/src/superio/nsc/pc87366/pc87366.h
new file mode 100644
index 0000000000..d1bc9de319
--- /dev/null
+++ b/src/superio/nsc/pc87366/pc87366.h
@@ -0,0 +1,16 @@
+#define PC87366_FDC  0x00 /* Floppy */
+#define PC87366_PP   0x01 /* Parallel port */
+#define PC87366_SP2  0x02 /* Com2 */
+#define PC87366_SP1  0x03 /* Com1 */
+#define PC87366_SWC  0x04
+#define PC87366_KBCM 0x05 /* Mouse */
+#define PC87366_KBCK 0x06 /* Keyboard */
+#define PC87366_GPIO 0x07
+#define PC87366_ACB  0x08
+#define PC87366_FSCM 0x09
+#define PC87366_WDT  0x0A
+#define PC87366_GMP  0x0b
+#define PC87366_MIDI  0x0C
+#define PC87366_VLM  0x0D
+#define PC87366_TMS  0x0E
+
diff --git a/src/superio/nsc/pc87366/pc87366_early_serial.c b/src/superio/nsc/pc87366/pc87366_early_serial.c
new file mode 100644
index 0000000000..354714f7b7
--- /dev/null
+++ b/src/superio/nsc/pc87366/pc87366_early_serial.c
@@ -0,0 +1,11 @@
+#include <arch/romcc_io.h>
+#include "pc87366.h"
+
+
+static void pc87366_enable_serial(device_t dev, unsigned iobase)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}
diff --git a/src/superio/nsc/pc87366/superio.c b/src/superio/nsc/pc87366/superio.c
new file mode 100644
index 0000000000..732ad3fee1
--- /dev/null
+++ b/src/superio/nsc/pc87366/superio.c
@@ -0,0 +1,76 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* Copyright 2003-2004 Linux Networx */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <string.h>
+#include <bitops.h>
+#include <uart8250.h>
+#include <pc80/keyboard.h>
+#include "chip.h"
+#include "pc87366.h"
+
+static void init(device_t dev)
+{
+	struct superio_nsc_pc87366_config *conf;
+	struct resource *res0, *res1;
+	/* Wishlist handle well known programming interfaces more
+	 * generically.
+	 */
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case PC87366_SP1: 
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+	case PC87366_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+	case PC87366_KBCK:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC87366_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
+ { &ops, PC87366_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
+ { &ops, PC87366_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
+ { &ops, PC87366_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, PC87366_SWC,  PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
+ { &ops, PC87366_KBCM, PNP_IRQ0 },
+ { &ops, PC87366_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
+ { &ops, PC87366_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC87366_ACB,  PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC87366_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC87366_WDT,  PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } },
+};
+
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &pnp_ops, 
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_nsc_pc87366_ops = {
+	CHIP_NAME("NSC 87366")
+	.enable_dev = enable_dev,
+};
diff --git a/src/superio/nsc/pc87417/Config.lb b/src/superio/nsc/pc87417/Config.lb
new file mode 100644
index 0000000000..f62a567d61
--- /dev/null
+++ b/src/superio/nsc/pc87417/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.o
diff --git a/src/superio/nsc/pc87417/chip.h b/src/superio/nsc/pc87417/chip.h
new file mode 100644
index 0000000000..e3c8891d53
--- /dev/null
+++ b/src/superio/nsc/pc87417/chip.h
@@ -0,0 +1,9 @@
+extern struct chip_operations superio_nsc_pc87417_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_nsc_pc87417_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};
diff --git a/src/superio/nsc/pc87417/pc87417.h b/src/superio/nsc/pc87417/pc87417.h
new file mode 100644
index 0000000000..7d5cad9545
--- /dev/null
+++ b/src/superio/nsc/pc87417/pc87417.h
@@ -0,0 +1,92 @@
+#define PC87417_FDC  0x00 /* Floppy */
+#define PC87417_PP   0x01 /* Parallel Port */
+#define PC87417_SP2  0x02 /* Com2 */
+#define PC87417_SP1  0x03 /* Com1 */
+#define PC87417_SWC  0x04 /* System Wake-Up Controller (SWC) */
+#define PC87417_KBCM 0x05 /* Mouse */
+#define PC87417_KBCK 0x06 /* Keyboard */
+#define PC87417_GPIO 0x07
+#define PC87417_XBUS 0x0F
+#define PC87417_RTC  0x10
+
+#define PC87417_GPIO_DEV PNP_DEV(0x2e, PC87417_GPIO)
+/* This is to get around a romcc bug */
+//#define PC87417_XBUS_DEV PNP_DEV(0x2e, PC87417_XBUS)
+#define PC87417_XBUS_DEV PNP_DEV(0x2e, 0x0f)
+
+#define PC87417_GPSEL		0xf0
+#define PC87417_GPCFG1		0xf1
+#define PC87417_GPEVR		0xf2
+#define PC87417_GPCFG2		0xf3
+#define PC87417_EXTCFG		0xf4
+#define PC87417_IOEXT1A		0xf5
+#define PC87417_IOEXT1B		0xf6
+#define PC87417_IOEXT2A		0xf7
+#define PC87417_IOEXT2B		0xf8
+
+#define PC87417_GPDO_0		0x00
+#define PC87417_GPDI_0		0x01
+#define PC87417_GPDO_1		0x02
+#define PC87417_GPDI_1		0x03
+#define PC87417_GPEVEN_1	0x04
+#define PC87417_GPEVST_1	0x05
+#define PC87417_GPDO_2		0x06
+#define PC87417_GPDI_2		0x07
+#define PC87417_GPDO_3		0x08
+#define PC87417_GPDI_3		0x09
+#define PC87417_GPDO_4		0x0a
+#define PC87417_GPDI_4		0x0b
+#define PC87417_GPEVEN_4	0x0c
+#define PC87417_GPEVST_4	0x0d
+#define PC87417_GPDO_5		0x0e
+#define PC87417_GPDI_5		0x0f
+#define PC87417_GPDO_6		0x10
+#define PC87417_GPDO_7A		0x11
+#define PC87417_GPDO_7B		0x12
+#define PC87417_GPDO_7C		0x13
+#define PC87417_GPDO_7D		0x14
+#define PC87417_GPDI_7A		0x15
+#define PC87417_GPDI_7B		0x16
+#define PC87417_GPDI_7C		0x17
+#define PC87417_GPDI_7D		0x18
+
+#define PC87417_XIOCNF		0xf0
+#define PC87417_XIOBA1H		0xf1
+#define PC87417_XIOBA1L		0xf2
+#define PC87417_XIOSIZE1	0xf3
+#define PC87417_XIOBA2H		0xf4
+#define PC87417_XIOBA2L		0xf5
+#define PC87417_XIOSIZE2	0xf6
+#define PC87417_XMEMCNF1	0xf7
+#define PC87417_XMEMCNF2	0xf8
+#define PC87417_XMEMBAH		0xf9
+#define PC87417_XMEMBAL		0xfa
+#define PC87417_XMEMSIZE	0xfb
+#define PC87417_XIRQMAP1	0xfc
+#define PC87417_XIRQMAP2	0xfd
+#define PC87417_XBIMM		0xfe
+#define PC87417_XBBSL		0xff
+
+#define PC87417_XBCNF		0x00
+#define PC87417_XZCNF0		0x01
+#define PC87417_XZCNF1		0x02
+#define PC87417_XIRQC0		0x04
+#define PC87417_XIRQC1		0x05
+#define PC87417_XIRQC2		0x06
+#define PC87417_XIMA0		0x08
+#define PC87417_XIMA1		0x09
+#define PC87417_XIMA2		0x0a
+#define PC87417_XIMA3		0x0b
+#define PC87417_XIMD		0x0c
+#define PC87417_XZCNF2		0x0d
+#define PC87417_XZCNF3		0x0e
+#define PC87417_XZM0		0x0f
+#define PC87417_XZM1		0x10
+#define PC87417_XZM2		0x11
+#define PC87417_XZM3		0x12
+#define PC87417_HAP0		0x13
+#define PC87417_HAP1		0x14
+#define PC87417_XSCNF		0x15
+#define PC87417_XWBCNF		0x16
+
+
diff --git a/src/superio/nsc/pc87417/pc87417_early_init.c b/src/superio/nsc/pc87417/pc87417_early_init.c
new file mode 100644
index 0000000000..028f02e66e
--- /dev/null
+++ b/src/superio/nsc/pc87417/pc87417_early_init.c
@@ -0,0 +1,31 @@
+#include <arch/romcc_io.h>
+#include "pc87417.h"
+
+static void pc87417_disable_dev(device_t dev)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+}
+static void pc87417_enable_dev(device_t dev, unsigned iobase)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}
+static void xbus_cfg(device_t dev)
+{
+	uint8_t i, data;
+	uint16_t xbus_index;
+
+	pnp_set_logical_device(dev);
+	/* select proper BIOS size (4MB) */
+	pnp_write_config(dev, PC87417_XMEMCNF2, (pnp_read_config(dev, PC87417_XMEMCNF2)) | 0x04);
+	xbus_index = pnp_read_iobase(dev, 0x60);
+
+	/* enable writes to devices attached to XCS0 (XBUS Chip Select 0) */
+	for (i=0; i<= 0xf; i++) {
+		outb((i<<4), xbus_index + PC87417_HAP0);
+	}
+	return; 
+}	
diff --git a/src/superio/nsc/pc87417/pc87417_early_serial.c b/src/superio/nsc/pc87417/pc87417_early_serial.c
new file mode 100644
index 0000000000..cb91d21296
--- /dev/null
+++ b/src/superio/nsc/pc87417/pc87417_early_serial.c
@@ -0,0 +1,16 @@
+#include <arch/romcc_io.h>
+#include "pc87417.h"
+
+
+static void pc87417_enable_serial(device_t dev, unsigned iobase)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}
+static void pc87417_enable_dev(device_t dev)
+{
+        pnp_set_logical_device(dev);
+        pnp_set_enable(dev, 1);
+}
diff --git a/src/superio/nsc/pc87417/superio.c b/src/superio/nsc/pc87417/superio.c
new file mode 100644
index 0000000000..f7a679c6e2
--- /dev/null
+++ b/src/superio/nsc/pc87417/superio.c
@@ -0,0 +1,77 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* Copyright 2003-2004 Linux Networx */
+/* Copyright 2005 Tyan */
+/* By yhlu */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <string.h>
+#include <bitops.h>
+#include <uart8250.h>
+#include <pc80/keyboard.h>
+#include "chip.h"
+#include "pc87417.h"
+
+static void init(device_t dev)
+{
+	struct superio_nsc_pc87417_config *conf;
+	struct resource *res0, *res1;
+	/* Wishlist handle well known programming interfaces more
+	 * generically.
+	 */
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case PC87417_SP1: 
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+	case PC87417_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+	case PC87417_KBCK:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC87417_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
+ { &ops, PC87417_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
+ { &ops, PC87417_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
+ { &ops, PC87417_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, PC87417_SWC,  PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
+ { &ops, PC87417_KBCM, PNP_IRQ0 },
+ { &ops, PC87417_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
+ { &ops, PC87417_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC87417_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
+ { &ops, PC87417_RTC,  PNP_IO0 | PNP_IO1, { 0xfffe, 0 }, {0xfffe, 0x4} },
+};
+
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &pnp_ops,
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_nsc_pc87417_ops = {
+	CHIP_NAME("NSC pc87417")
+	.enable_dev = enable_dev,
+};
diff --git a/src/superio/nsc/pc87427/Config.lb b/src/superio/nsc/pc87427/Config.lb
new file mode 100644
index 0000000000..f62a567d61
--- /dev/null
+++ b/src/superio/nsc/pc87427/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.o
diff --git a/src/superio/nsc/pc87427/chip.h b/src/superio/nsc/pc87427/chip.h
new file mode 100644
index 0000000000..8eaf135702
--- /dev/null
+++ b/src/superio/nsc/pc87427/chip.h
@@ -0,0 +1,9 @@
+extern struct chip_operations superio_nsc_pc87427_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_nsc_pc87427_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};
diff --git a/src/superio/nsc/pc87427/pc87427.h b/src/superio/nsc/pc87427/pc87427.h
new file mode 100644
index 0000000000..d998bd6c20
--- /dev/null
+++ b/src/superio/nsc/pc87427/pc87427.h
@@ -0,0 +1,94 @@
+#define PC87427_FDC  0x00 /* Floppy */
+#define PC87427_SP2  0x02 /* Com2 */
+#define PC87427_SP1  0x03 /* Com1 */
+#define PC87427_SWC  0x04
+#define PC87427_KBCM 0x05 /* Mouse */
+#define PC87427_KBCK 0x06 /* Keyboard */
+#define PC87427_GPIO 0x07
+#define PC87427_FMC  0x09
+#define PC87427_WDT  0x0A
+#define PC87427_XBUS 0x0F
+#define PC87427_RTC  0x10
+#define PC87427_MHC  0x14
+
+#define PC87427_GPIO_DEV PNP_DEV(0x2e, PC87427_GPIO)
+/* This is to get around a romcc bug */
+//#define PC87427_XBUS_DEV PNP_DEV(0x2e, PC87427_XBUS)
+#define PC87427_XBUS_DEV PNP_DEV(0x2e, 0x0f)
+
+#define PC87427_GPSEL		0xf0
+#define PC87427_GPCFG1		0xf1
+#define PC87427_GPEVR		0xf2
+#define PC87427_GPCFG2		0xf3
+#define PC87427_EXTCFG		0xf4
+#define PC87427_IOEXT1A		0xf5
+#define PC87427_IOEXT1B		0xf6
+#define PC87427_IOEXT2A		0xf7
+#define PC87427_IOEXT2B		0xf8
+
+#define PC87427_GPDO_0		0x00
+#define PC87427_GPDI_0		0x01
+#define PC87427_GPDO_1		0x02
+#define PC87427_GPDI_1		0x03
+#define PC87427_GPEVEN_1	0x04
+#define PC87427_GPEVST_1	0x05
+#define PC87427_GPDO_2		0x06
+#define PC87427_GPDI_2		0x07
+#define PC87427_GPDO_3		0x08
+#define PC87427_GPDI_3		0x09
+#define PC87427_GPDO_4		0x0a
+#define PC87427_GPDI_4		0x0b
+#define PC87427_GPEVEN_4	0x0c
+#define PC87427_GPEVST_4	0x0d
+#define PC87427_GPDO_5		0x0e
+#define PC87427_GPDI_5		0x0f
+#define PC87427_GPDO_6		0x10
+#define PC87427_GPDO_7A		0x11
+#define PC87427_GPDO_7B		0x12
+#define PC87427_GPDO_7C		0x13
+#define PC87427_GPDO_7D		0x14
+#define PC87427_GPDI_7A		0x15
+#define PC87427_GPDI_7B		0x16
+#define PC87427_GPDI_7C		0x17
+#define PC87427_GPDI_7D		0x18
+
+#define PC87427_XIOCNF		0xf0
+#define PC87427_XIOBA1H		0xf1
+#define PC87427_XIOBA1L		0xf2
+#define PC87427_XIOSIZE1	0xf3
+#define PC87427_XIOBA2H		0xf4
+#define PC87427_XIOBA2L		0xf5
+#define PC87427_XIOSIZE2	0xf6
+#define PC87427_XMEMCNF1	0xf7
+#define PC87427_XMEMCNF2	0xf8
+#define PC87427_XMEMBAH		0xf9
+#define PC87427_XMEMBAL		0xfa
+#define PC87427_XMEMSIZE	0xfb
+#define PC87427_XIRQMAP1	0xfc
+#define PC87427_XIRQMAP2	0xfd
+#define PC87427_XBIMM		0xfe
+#define PC87427_XBBSL		0xff
+
+#define PC87427_XBCNF		0x00
+#define PC87427_XZCNF0		0x01
+#define PC87427_XZCNF1		0x02
+#define PC87427_XIRQC0		0x04
+#define PC87427_XIRQC1		0x05
+#define PC87427_XIRQC2		0x06
+#define PC87427_XIMA0		0x08
+#define PC87427_XIMA1		0x09
+#define PC87427_XIMA2		0x0a
+#define PC87427_XIMA3		0x0b
+#define PC87427_XIMD		0x0c
+#define PC87427_XZCNF2		0x0d
+#define PC87427_XZCNF3		0x0e
+#define PC87427_XZM0		0x0f
+#define PC87427_XZM1		0x10
+#define PC87427_XZM2		0x11
+#define PC87427_XZM3		0x12
+#define PC87427_HAP0		0x13
+#define PC87427_HAP1		0x14
+#define PC87427_XSCNF		0x15
+#define PC87427_XWBCNF		0x16
+
+
diff --git a/src/superio/nsc/pc87427/pc87427_early_init.c b/src/superio/nsc/pc87427/pc87427_early_init.c
new file mode 100644
index 0000000000..71f702f11f
--- /dev/null
+++ b/src/superio/nsc/pc87427/pc87427_early_init.c
@@ -0,0 +1,31 @@
+#include <arch/romcc_io.h>
+#include "pc87427.h"
+
+static void pc87427_disable_dev(device_t dev)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+}
+static void pc87427_enable_dev(device_t dev, unsigned iobase)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}
+static void xbus_cfg(device_t dev)
+{
+	uint8_t i, data;
+	uint16_t xbus_index;
+
+	pnp_set_logical_device(dev);
+	/* select proper BIOS size (4MB) */
+	pnp_write_config(dev, PC87427_XMEMCNF2, (pnp_read_config(dev, PC87427_XMEMCNF2)) | 0x04);
+	xbus_index = pnp_read_iobase(dev, 0x60);
+
+	/* enable writes to devices attached to XCS0 (XBUS Chip Select 0) */
+	for (i=0; i<= 0xf; i++) {
+		outb((i<<4), xbus_index + PC87427_HAP0);
+	}
+	return; 
+}	
diff --git a/src/superio/nsc/pc87427/superio.c b/src/superio/nsc/pc87427/superio.c
new file mode 100644
index 0000000000..6f192f6631
--- /dev/null
+++ b/src/superio/nsc/pc87427/superio.c
@@ -0,0 +1,77 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* Copyright 2003-2004 Linux Networx */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <string.h>
+#include <bitops.h>
+#include "chip.h"
+#include "pc87427.h"
+
+
+static void init(device_t dev)
+{
+	struct superio_nsc_pc87427_config *conf;
+	struct resource *res0, *res1;
+	/* Wishlist handle well known programming interfaces more
+	 * generically.
+	 */
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case PC87427_SP1: 
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+	case PC87427_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+	case PC87427_KBCK:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops,  PC87427_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
+ { &ops,  PC87427_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops,  PC87427_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops,  PC87427_SWC,  PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0, 
+   { 0xfff0, 0 }, { 0xfffc, 0 }, { 0xfffc, 0 }, { 0xfff8, 0 } },
+ { &ops,  PC87427_KBCM, PNP_IRQ0 },
+ { &ops,  PC87427_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
+ { &ops,  PC87427_GPIO, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
+ { &ops,  PC87427_WDT,  PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 } },
+ { &ops,  PC87427_FMC,  PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
+ { &ops,  PC87427_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
+ { &ops,  PC87427_RTC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xfffe, 0 }, { 0xfffe, 0 } },
+ { &ops,  PC87427_MHC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffe0, 0 }, { 0xffe0, 0 } },
+};
+
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &ops,
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); 
+}
+
+struct chip_operations superio_nsc_pc87427_ops = {
+	CHIP_NAME("NSC 87427")
+	.enable_dev = enable_dev,
+};
diff --git a/src/superio/nsc/pc97307/Config.lb b/src/superio/nsc/pc97307/Config.lb
new file mode 100644
index 0000000000..94a888e767
--- /dev/null
+++ b/src/superio/nsc/pc97307/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.c
diff --git a/src/superio/nsc/pc97307/chip.h b/src/superio/nsc/pc97307/chip.h
new file mode 100644
index 0000000000..3e6b7f64ad
--- /dev/null
+++ b/src/superio/nsc/pc97307/chip.h
@@ -0,0 +1,20 @@
+#ifndef _SUPERIO_NSC_PC97307
+#define _SUPERIO_NSC_PC97307
+
+#ifndef PNP_INDEX_REG
+#define PNP_INDEX_REG   0x15C
+#endif
+#ifndef PNP_DATA_REG
+#define PNP_DATA_REG    0x15D
+#endif
+
+extern struct chip_operations superio_nsc_pc97307_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_nsc_pc97307_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};
+#endif /* _SUPERIO_NSC_PC97307 */
diff --git a/src/superio/nsc/pc97307/pc97307.h b/src/superio/nsc/pc97307/pc97307.h
new file mode 100644
index 0000000000..fa1f7f69b5
--- /dev/null
+++ b/src/superio/nsc/pc97307/pc97307.h
@@ -0,0 +1,10 @@
+#define PC97307_KBCK 0x00 /* Keyboard */
+#define PC97307_KBCM 0x01 /* Mouse */
+#define PC97307_RTC  0x02 /* Real-Time Clock */
+#define PC97307_FDC  0x03 /* Floppy */
+#define PC97307_PP   0x04 /* Parallel port */
+#define PC97307_SP2  0x05 /* Com2 */
+#define PC97307_SP1  0x06 /* Com1 */
+#define PC97307_GPIO 0x07
+#define PC97307_PM   0x08 /* Power Management */
+
diff --git a/src/superio/nsc/pc97307/superio.c b/src/superio/nsc/pc97307/superio.c
new file mode 100644
index 0000000000..b2de76a4c1
--- /dev/null
+++ b/src/superio/nsc/pc97307/superio.c
@@ -0,0 +1,88 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include "chip.h"
+#include "pc97307.h"
+
+static void init(device_t dev)
+{
+	struct superio_nsc_pc97307_config *conf;
+	struct resource *res0, *res1;
+
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case PC97307_SP1:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+
+	case PC97307_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+
+	case PC97307_KBCK:
+		/* Enable keyboard */
+		pnp_set_logical_device(dev);
+		pnp_set_enable(dev, 0); /* Disable keyboard */
+		pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 Mhz */
+		pnp_set_enable(dev, 1); /* Enable keyboard */
+
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+
+	case PC97307_FDC:
+	{
+		unsigned reg;
+		/* Set up floppy in PS/2 mode */
+		outb(0x09, SIO_CONFIG_RA);
+		reg = inb(SIO_CONFIG_RD);
+		reg = (reg & 0x3F) | 0x40;
+		outb(reg, SIO_CONFIG_RD);
+		outb(reg, SIO_CONFIG_RD);       /* Have to write twice to change! */
+		break;
+	}
+	default:
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC97307_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
+ { &ops, PC97307_KBCM, PNP_IRQ0 },
+ { &ops, PC97307_RTC,  PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
+ { &ops, PC97307_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
+ { &ops, PC97307_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
+ { &ops, PC97307_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
+ { &ops, PC97307_SP1,  PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
+ { &ops, PC97307_GPIO, PNP_IO0, { 0xfff8, 0 } },
+ { &ops, PC97307_PM,   PNP_IO0, { 0xfffe, 0 } },
+};
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &ops,
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_nsc_pc97307_ops = {
+	CHIP_NAME("NSC 97307")
+	.enable_dev = enable_dev,
+};
diff --git a/src/superio/nsc/pc97317/Config.lb b/src/superio/nsc/pc97317/Config.lb
new file mode 100644
index 0000000000..94a888e767
--- /dev/null
+++ b/src/superio/nsc/pc97317/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.c
diff --git a/src/superio/nsc/pc97317/chip.h b/src/superio/nsc/pc97317/chip.h
new file mode 100644
index 0000000000..7997dff8bc
--- /dev/null
+++ b/src/superio/nsc/pc97317/chip.h
@@ -0,0 +1,20 @@
+#ifndef _SUPERIO_NSC_PC97317
+#define _SUPERIO_NSC_PC97317
+
+#ifndef PNP_INDEX_REG
+#define PNP_INDEX_REG   0x15C
+#endif
+#ifndef PNP_DATA_REG
+#define PNP_DATA_REG    0x15D
+#endif
+
+extern struct chip_operations superio_nsc_pc97317_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_nsc_pc97317_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};
+#endif /* _SUPERIO_NSC_PC97317 */
diff --git a/src/superio/nsc/pc97317/pc97317.h b/src/superio/nsc/pc97317/pc97317.h
new file mode 100644
index 0000000000..cdeca2acea
--- /dev/null
+++ b/src/superio/nsc/pc97317/pc97317.h
@@ -0,0 +1,10 @@
+#define PC97317_KBCK 0x00 /* Keyboard */
+#define PC97317_KBCM 0x01 /* Mouse */
+#define PC97317_RTC  0x02 /* Real-Time Clock */
+#define PC97317_FDC  0x03 /* Floppy */
+#define PC97317_PP   0x04 /* Parallel port */
+#define PC97317_SP2  0x05 /* Com2 */
+#define PC97317_SP1  0x06 /* Com1 */
+#define PC97317_GPIO 0x07
+#define PC97317_PM   0x08 /* Power Management */
+
diff --git a/src/superio/nsc/pc97317/pc97317_early_serial.c b/src/superio/nsc/pc97317/pc97317_early_serial.c
new file mode 100644
index 0000000000..3aa7f99890
--- /dev/null
+++ b/src/superio/nsc/pc97317/pc97317_early_serial.c
@@ -0,0 +1,33 @@
+#include <arch/romcc_io.h>
+#include "pc97317.h"
+
+#define PM_DEV PNP_DEV(0x2e, PC97317_PM)
+#define PM_BASE 0xe8
+
+/* The pc97317 needs clocks to be set up before the serial port will operate */
+
+static void pc97317_enable_serial(device_t dev, unsigned iobase)
+{
+	/* Set base address of power management unit */
+
+	pnp_set_logical_device(PM_DEV);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, PM_BASE);
+	pnp_set_enable(dev, 1);
+
+	/* Use on-chip clock multiplier */
+
+	outb(0x03, PM_BASE);
+	outb(inb(PM_BASE + 1) | 0x07, PM_BASE + 1);
+	
+	/* Wait for the clock to stabilise */
+	while(!inb(PM_BASE + 1 & 0x80))
+		;
+
+	/* Set the base address of the port */
+
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}
diff --git a/src/superio/nsc/pc97317/superio.c b/src/superio/nsc/pc97317/superio.c
new file mode 100644
index 0000000000..59a1214f7b
--- /dev/null
+++ b/src/superio/nsc/pc97317/superio.c
@@ -0,0 +1,90 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include "chip.h"
+#include "pc97317.h"
+
+static void init(device_t dev)
+{
+	struct superio_nsc_pc97317_config *conf;
+	struct resource *res0, *res1;
+
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case PC97317_SP1:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+
+	case PC97317_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+
+	case PC97317_KBCK:
+		/* Enable keyboard */
+		pnp_set_logical_device(dev);
+		pnp_set_enable(dev, 0); /* Disable keyboard */
+		pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 Mhz */
+		pnp_set_enable(dev, 1); /* Enable keyboard */
+
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+
+#if 0
+	case PC97317_FDC:
+	{
+		unsigned reg;
+		/* Set up floppy in PS/2 mode */
+		outb(0x09, SIO_CONFIG_RA);
+		reg = inb(SIO_CONFIG_RD);
+		reg = (reg & 0x3F) | 0x40;
+		outb(reg, SIO_CONFIG_RD);
+		outb(reg, SIO_CONFIG_RD);       /* Have to write twice to change! */
+		break;
+	}
+#endif
+	default:
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC97317_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
+ { &ops, PC97317_KBCM, PNP_IRQ0 },
+ { &ops, PC97317_RTC,  PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
+ { &ops, PC97317_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
+ { &ops, PC97317_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
+ { &ops, PC97317_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
+ { &ops, PC97317_SP1,  PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
+ { &ops, PC97317_GPIO, PNP_IO0, { 0xfff8, 0 } },
+ { &ops, PC97317_PM,   PNP_IO0, { 0xfffe, 0 } },
+};
+
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &ops,
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_nsc_pc97317_ops = {
+	CHIP_NAME("NSC 97317")
+	.enable_dev = enable_dev,
+};