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author | Shelley Chen <shchen@google.com> | 2019-02-06 13:55:09 -0800 |
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committer | Shelley Chen <shchen@google.com> | 2019-02-08 19:01:32 +0000 |
commit | 98ce3f8dadc3e84fbee4b141227c6acc79d4788f (patch) | |
tree | 0fde494638746c0178ab987b12513f6ed73e5ac7 /src/superio/nuvoton/nct5104d | |
parent | fa9c6f13d2734ddaad6197564e3a072a4cecd515 (diff) | |
download | coreboot-98ce3f8dadc3e84fbee4b141227c6acc79d4788f.tar.xz |
mb/google/hatch: Replace part-specific SPD files with generic ones
Traditionally, we have always allocated 1 DRAM ID per part number.
However, on nami, we have run out of DRAM IDs because we have
supported so many different parts. We are now adopting the use of
generic SPD files that are feature-based rather than specific to each
part, allowing us to support multiple parts with a single SPD.
The common SPDs were created by taking current SPDs in Nami (which is
using the same DDR4 parts as Hatch) and zeroing out all the
manufacturer information and part names. Additionally, we zeroed out
bytes 128 (raw card extension, module nominal height), 129 (module
maximum thickness), and 130 (reference raw card used) after verifying
that they are not used in FSP. We verified with these fields zeroed
out, all nami devices could boot up without errors. We also verified
on the two Hatch skus that we have (4G 2400, 8G 2666) that the generic
SPDs boot properly.
BUG=b:122959294
BRANCH=None
TEST=Make sure that we can boot up on both 4G Samsung and 8G Hynix DDR4
devices that we currently have.
Change-Id: I14d9e6b13975b6a65b506e6cd475160711b8f6d4
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/31261
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/superio/nuvoton/nct5104d')
0 files changed, 0 insertions, 0 deletions