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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-12-05 11:05:19 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2019-12-05 15:28:33 +0000 |
| commit | 36c6f956029178fd78d7b2f3ebfddc264078fec7 (patch) | |
| tree | bf02af408d584228dd1a87ded62f82f0d1a2b132 /src/superio/smsc/lpc47n217 | |
| parent | b21999cbede5fc24ec28c47b0c89a4eb08f1ccad (diff) | |
| download | coreboot-36c6f956029178fd78d7b2f3ebfddc264078fec7.tar.xz | |
superio/smsc/lpc47n2{17,27}: Fix typo
Change-Id: I29a42908af5699200216b7a0082e1417c90c95a6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37510
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/superio/smsc/lpc47n217')
| -rw-r--r-- | src/superio/smsc/lpc47n217/early_serial.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/superio/smsc/lpc47n217/early_serial.c b/src/superio/smsc/lpc47n217/early_serial.c index 5fb8d7fcdb..8037ee890d 100644 --- a/src/superio/smsc/lpc47n217/early_serial.c +++ b/src/superio/smsc/lpc47n217/early_serial.c @@ -69,7 +69,7 @@ static void lpc47n217_pnp_set_iobase(pnp_devfn_t dev, u16 iobase) * true base port is programmed (see lpc47n217_enable_serial() below). * * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. - * @param enable 0 to disable, anythig else to enable. + * @param enable 0 to disable, anything else to enable. */ static void lpc47n217_pnp_set_enable(pnp_devfn_t dev, int enable) { |