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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-07-09 20:26:25 +1000
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-10-27 12:50:33 +0100
commit85836c2215498ff18746b3a7e85ed684cf2e119e (patch)
tree1b774a8f00fda2e0ccc1939105e5f4f2c7c8abe3 /src/superio/smsc/lpc47n227
parent377fd754932922e8c907994ef3e4d8ab925c6132 (diff)
downloadcoreboot-85836c2215498ff18746b3a7e85ed684cf2e119e.tar.xz
superio: Use 'pnp_devfn_t' over 'device_t' in romstage component
The romstage component of Super I/O support is in fact written around passing a lower and upper half packed integer. We currently have two typedef's for this, 'device_t' and 'pnp_devfn_t'. We wish to make use of 'pnp_devfn_t' over 'device_t' as 'device_t' changes it's typedef in the ramstage context and so is really a conflicting definition. This helps solve problems down the road to having the 'real' 'device_t' definition usable in romstage later. This follows on from the rational given in: c2956e7 device/pci_early.c: Mixes up variants of a typedefs to 'u32' Change-Id: Ia9f238ebb944f9fe7b274621ee0c09a6de288a76 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6231 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/superio/smsc/lpc47n227')
-rw-r--r--src/superio/smsc/lpc47n227/early_serial.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/superio/smsc/lpc47n227/early_serial.c b/src/superio/smsc/lpc47n227/early_serial.c
index 4aea7c57fc..64a6d84a2c 100644
--- a/src/superio/smsc/lpc47n227/early_serial.c
+++ b/src/superio/smsc/lpc47n227/early_serial.c
@@ -23,13 +23,13 @@
#include <arch/io.h>
#include "lpc47n227.h"
-static void pnp_enter_conf_state(device_t dev)
+static void pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0x55, port);
}
-static void pnp_exit_conf_state(device_t dev)
+static void pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(0xaa, port);
@@ -41,7 +41,7 @@ static void pnp_exit_conf_state(device_t dev)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param iobase Base I/O port for the logical device.
*/
-static void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase)
+static void lpc47n227_pnp_set_iobase(pnp_devfn_t dev, u16 iobase)
{
/* LPC47N227 requires base ports to be a multiple of 4. */
/* it's not very useful to do an ASSERT here: if it trips,
@@ -76,7 +76,7 @@ static void lpc47n227_pnp_set_iobase(device_t dev, u16 iobase)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param enable 0 to disable, anythig else to enable.
*/
-static void lpc47n227_pnp_set_enable(device_t dev, int enable)
+static void lpc47n227_pnp_set_enable(pnp_devfn_t dev, int enable)
{
u8 power_register = 0, power_mask = 0, current_power, new_power;
@@ -111,7 +111,7 @@ static void lpc47n227_pnp_set_enable(device_t dev, int enable)
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param iobase Processor I/O port address to assign to this serial device.
*/
-static void lpc47n227_enable_serial(device_t dev, u16 iobase)
+static void lpc47n227_enable_serial(pnp_devfn_t dev, u16 iobase)
{
/*
* NOTE: Cannot use pnp_set_XXX() here because they assume chip