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authorMarc Jones <marc.jones@se-eng.com>2013-10-30 16:18:07 -0600
committerKyösti Mälkki <kyosti.malkki@gmail.com>2013-11-10 14:19:28 +0100
commit04134a52b2077d0a77819ea12ee9646050e8edc0 (patch)
treefab8efa8988f60753657010eadc0df8b82f80bf0 /src/superio/smsc/sio1007/early_serial.c
parentc4b6f3bacb7a2ac139f8b85c85388ef6fbda96d9 (diff)
downloadcoreboot-04134a52b2077d0a77819ea12ee9646050e8edc0.tar.xz
sio1007: Properly build '.c' files
Properly build the super i/o .c files. This prevents including the .c file directly in romstage, which is generally bad practice. Adding a Makefile and a .h file to include. Change-Id: I0be66e94d3062a2c4a445cee2f12ec249598dc8b Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/4014 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/superio/smsc/sio1007/early_serial.c')
-rw-r--r--src/superio/smsc/sio1007/early_serial.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/src/superio/smsc/sio1007/early_serial.c b/src/superio/smsc/sio1007/early_serial.c
index 859e351765..d1d28b2b11 100644
--- a/src/superio/smsc/sio1007/early_serial.c
+++ b/src/superio/smsc/sio1007/early_serial.c
@@ -17,13 +17,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/*
- * The chip could be bootstrap mapped to one of four LPC addresses:
- * 0x2e, 0x4e, 0x162e, and 0x164e.
- */
-const u16 sio1007_lpc_ports[] = {0x2e, 0x4e, 0x162e, 0x164e};
+#include <stdint.h>
+#include <arch/io.h>
+#include "chip.h"
-static void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask)
+void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask)
{
u8 reg_value;
@@ -34,7 +32,7 @@ static void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask)
outb(reg_value, lpc_port + 1);
}
-static int sio1007_enable_uart_at(u16 port)
+int sio1007_enable_uart_at(u16 port)
{
/* Enable config mode. */
outb(0x55, port);