trival. All the changes is about comment and spaces.

In superio folder.

1. Delete trailing white spaces.
2. Change the // comment to /* */.
3. Add some copyright header.
4. reindent.
5. delete multi blank lines.

I tried my best to find them. If anything left, please fix it
or tell me.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4993 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

35 files changed, 744 insertions, 502 deletions

diff --git a/src/superio/smsc/fdc37m60x/Config.lb b/src/superio/smsc/fdc37m60x/Config.lb
index e1290e2fad..8e91c171ce 100644
--- a/src/superio/smsc/fdc37m60x/Config.lb
+++ b/src/superio/smsc/fdc37m60x/Config.lb
@@ -20,4 +20,3 @@
 
 config chip.h
 object superio.o
-
diff --git a/src/superio/smsc/fdc37m60x/Makefile.inc b/src/superio/smsc/fdc37m60x/Makefile.inc
index 2ba5572bcc..3d7144a139 100644
--- a/src/superio/smsc/fdc37m60x/Makefile.inc
+++ b/src/superio/smsc/fdc37m60x/Makefile.inc
@@ -20,4 +20,3 @@
 
 #config chip.h
 obj-$(CONFIG_SUPERIO_SMSC_FDC37M60X) += superio.o
-
diff --git a/src/superio/smsc/fdc37m60x/chip.h b/src/superio/smsc/fdc37m60x/chip.h
index cf91ff88a9..d4da77bf13 100644
--- a/src/superio/smsc/fdc37m60x/chip.h
+++ b/src/superio/smsc/fdc37m60x/chip.h
@@ -33,4 +33,3 @@ struct superio_smsc_fdc37m60x_config {
 };
 
 #endif /* _SUPERIO_SMSC_FDC37M60X */
-
diff --git a/src/superio/smsc/fdc37m60x/fdc37m60x.h b/src/superio/smsc/fdc37m60x/fdc37m60x.h
index 459b5b921e..3424faf903 100644
--- a/src/superio/smsc/fdc37m60x/fdc37m60x.h
+++ b/src/superio/smsc/fdc37m60x/fdc37m60x.h
@@ -36,4 +36,3 @@
 #define FDC37M60X_SP2  0x05 /* Com2 */
 #define FDC37M60X_KBCK 0x07 /* Keyboard */
 #define FDC37M60X_AUX  0x08 /* Auxiliary I/O */
-
diff --git a/src/superio/smsc/fdc37m60x/fdc37m60x_early_serial.c b/src/superio/smsc/fdc37m60x/fdc37m60x_early_serial.c
index 739f308299..1c1d334b62 100644
--- a/src/superio/smsc/fdc37m60x/fdc37m60x_early_serial.c
+++ b/src/superio/smsc/fdc37m60x/fdc37m60x_early_serial.c
@@ -75,4 +75,3 @@ static void fdc37m60x_enable_serial(device_t dev, unsigned iobase)
 	/* (3) Exit the configuration state. */
 	outb(0xaa, FDC37M60X_CONFIGURATION_PORT);
 }
-
diff --git a/src/superio/smsc/fdc37m60x/superio.c b/src/superio/smsc/fdc37m60x/superio.c
index 54225162c5..1e595c6c8a 100644
--- a/src/superio/smsc/fdc37m60x/superio.c
+++ b/src/superio/smsc/fdc37m60x/superio.c
@@ -70,9 +70,9 @@ static struct device_operations ops = {
 
 /* TODO: FDC, PP, AUX. */
 static struct pnp_info pnp_dev_info[] = {
- { &ops, FDC37M60X_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, FDC37M60X_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
- { &ops, FDC37M60X_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
+	{ &ops, FDC37M60X_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, FDC37M60X_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
+	{ &ops, FDC37M60X_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
 };
 
 static void enable_dev(struct device *dev)
@@ -85,4 +85,3 @@ struct chip_operations superio_smsc_fdc37m60x_ops = {
 	CHIP_NAME("SMSC FDC37M60X Super I/O")
 	.enable_dev = enable_dev,
 };
-
diff --git a/src/superio/smsc/lpc47b272/Config.lb b/src/superio/smsc/lpc47b272/Config.lb
index cb1e9fb6b2..5a15d159ae 100644
--- a/src/superio/smsc/lpc47b272/Config.lb
+++ b/src/superio/smsc/lpc47b272/Config.lb
@@ -20,4 +20,3 @@
 
 config chip.h
 object superio.o
-
diff --git a/src/superio/smsc/lpc47b272/Makefile.inc b/src/superio/smsc/lpc47b272/Makefile.inc
index c836e3537e..c9332aa42b 100644
--- a/src/superio/smsc/lpc47b272/Makefile.inc
+++ b/src/superio/smsc/lpc47b272/Makefile.inc
@@ -20,4 +20,3 @@
 
 #config chip.h
 obj-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.o
-
diff --git a/src/superio/smsc/lpc47b272/lpc47b272.h b/src/superio/smsc/lpc47b272/lpc47b272.h
index c7016d9bec..98639de88b 100644
--- a/src/superio/smsc/lpc47b272/lpc47b272.h
+++ b/src/superio/smsc/lpc47b272/lpc47b272.h
@@ -26,4 +26,3 @@
 #define LPC47B272_RT              10   /* Runtime reg*/
 
 #define LPC47B272_MAX_CONFIG_REGISTER	0x5F
-
diff --git a/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c b/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c
index 71641e9ff8..c1f15bf25e 100644
--- a/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c
+++ b/src/superio/smsc/lpc47b272/lpc47b272_early_serial.c
@@ -23,37 +23,39 @@
 #include <arch/romcc_io.h>
 #include "lpc47b272.h"
 
-//----------------------------------------------------------------------------------
-// Function:    	pnp_enter_conf_state
-// Parameters:  	dev - high 8 bits = Super I/O port
-// Return Value:	None
-// Description: 	Enable access to the LPC47B272's configuration registers.
-//
-static inline void pnp_enter_conf_state(device_t dev) {
+/*
+ * Function:    	pnp_enter_conf_state
+ * Parameters:  	dev - high 8 bits = Super I/O port
+ * Return Value:	None
+ * Description: 	Enable access to the LPC47B272's configuration registers.
+ */
+static inline void pnp_enter_conf_state(device_t dev)
+{
 	unsigned port = dev>>8;
-    outb(0x55, port);
+	outb(0x55, port);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	pnp_exit_conf_state
-// Parameters:  	dev - high 8 bits = Super I/O port
-// Return Value:	None
-// Description: 	Disable access to the LPC47B272's configuration registers.
-//
-static void pnp_exit_conf_state(device_t dev) {
+/*
+ * Function:    	pnp_exit_conf_state
+ * Parameters:  	dev - high 8 bits = Super I/O port
+ * Return Value:	None
+ * Description: 	Disable access to the LPC47B272's configuration registers.
+ */
+static void pnp_exit_conf_state(device_t dev)
+{
 	unsigned port = dev>>8;
-    outb(0xaa, port);
+	outb(0xaa, port);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	lpc47b272_enable_serial
-// Parameters:  	dev - high 8 bits = Super I/O port, 
-//						  low 8 bits = logical device number (per lpc47b272.h)
-//					iobase - processor I/O port address to assign to this serial device
-// Return Value:	bool
-// Description: 	Configure the base I/O port of the specified serial device
-//					and enable the serial device.
-//
+/*
+ * Function:    	lpc47b272_enable_serial
+ * Parameters:  	dev - high 8 bits = Super I/O port,
+ *			      low 8 bits = logical device number (per lpc47b272.h)
+ *			iobase - processor I/O port address to assign to this serial device
+ * Return Value:	bool
+ * Description: 	Configure the base I/O port of the specified serial device
+ *			and enable the serial device.
+ */
 static void lpc47b272_enable_serial(device_t dev, unsigned iobase)
 {
 	pnp_enter_conf_state(dev);
diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c
index 1a6a778537..93b39a370e 100644
--- a/src/superio/smsc/lpc47b272/superio.c
+++ b/src/superio/smsc/lpc47b272/superio.c
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 2000 AG Electronics Ltd.
  * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan 
+ * Copyright (C) 2004 Tyan
  * Copyright (C) 2005 Digital Design Corporation
  *
  * This program is free software; you can redistribute it and/or modify
@@ -36,7 +36,7 @@
 #include "chip.h"
 #include "lpc47b272.h"
 
-// Forward declarations
+/* Forward declarations */
 static void enable_dev(device_t dev);
 static void lpc47b272_pnp_set_resources(device_t dev);
 static void lpc47b272_pnp_enable_resources(device_t dev);
@@ -47,7 +47,6 @@ static void pnp_enter_conf_state(device_t dev);
 static void pnp_exit_conf_state(device_t dev);
 static void dump_pnp_device(device_t dev);
 
-
 struct chip_operations superio_smsc_lpc47b272_ops = {
 	CHIP_NAME("SMSC LPC47B272 Super I/O")
 	.enable_dev = enable_dev
@@ -62,56 +61,56 @@ static struct device_operations ops = {
 };
 
 static struct pnp_info pnp_dev_info[] = {
-        { &ops, LPC47B272_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-        { &ops, LPC47B272_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-        { &ops, LPC47B272_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-        { &ops, LPC47B272_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-        { &ops, LPC47B272_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
-        { &ops, LPC47B272_RT,   PNP_IO0, { 0x780, 0 }, },
+	{ &ops, LPC47B272_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	{ &ops, LPC47B272_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	{ &ops, LPC47B272_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, LPC47B272_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, LPC47B272_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
+	{ &ops, LPC47B272_RT,   PNP_IO0, { 0x780, 0 }, },
 };
 
 /**********************************************************************************/
-/*								PUBLIC INTERFACE								  */
+/*              		PUBLIC INTERFACE				  */
 /**********************************************************************************/
 
-//----------------------------------------------------------------------------------
-// Function:    	enable_dev
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Create device structures and allocate resources to devices 
-//					specified in the pnp_dev_info array (above).
-//
+/*
+ * Function:    	enable_dev
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Create device structures and allocate resources to devices
+ *			specified in the pnp_dev_info array (above).
+ */
 static void enable_dev(device_t dev)
 {
-	pnp_enable_devices(dev, &pnp_ops, 
-					   ARRAY_SIZE(pnp_dev_info), 
-					   pnp_dev_info);
+	pnp_enable_devices(dev, &pnp_ops,
+			   ARRAY_SIZE(pnp_dev_info),
+			   pnp_dev_info);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	lpc47b272_pnp_set_resources
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Configure the specified Super I/O device with the resources
-//					(I/O space, etc.) that have been allocated for it.
-//
+/*
+ * Function:    	lpc47b272_pnp_set_resources
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Configure the specified Super I/O device with the resources
+ *			(I/O space, etc.) that have been allocated for it.
+ */
 static void lpc47b272_pnp_set_resources(device_t dev)
 {
-	pnp_enter_conf_state(dev);  
+	pnp_enter_conf_state(dev);
 	pnp_set_resources(dev);
-    pnp_exit_conf_state(dev);  
-}       
+	pnp_exit_conf_state(dev);
+}
 
 static void lpc47b272_pnp_enable_resources(device_t dev)
-{       
+{
 	pnp_enter_conf_state(dev);
-    pnp_enable_resources(dev);
-    pnp_exit_conf_state(dev);
+	pnp_enable_resources(dev);
+	pnp_exit_conf_state(dev);
 }
 
 static void lpc47b272_pnp_enable(device_t dev)
 {
-	pnp_enter_conf_state(dev);   
+	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
 
 	if(dev->enabled) {
@@ -120,17 +119,17 @@ static void lpc47b272_pnp_enable(device_t dev)
 	else {
 		pnp_set_enable(dev, 0);
 	}
-	pnp_exit_conf_state(dev);  
+	pnp_exit_conf_state(dev);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	lpc47b272_init
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Initialize the specified Super I/O device.
-//					Devices other than COM ports and the keyboard controller are 
-//					ignored. For COM ports, we configure the baud rate. 
-//
+/*
+ * Function:    	lpc47b272_init
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Initialize the specified Super I/O device.
+ *			Devices other than COM ports and the keyboard controller are
+ *			ignored. For COM ports, we configure the baud rate.
+ */
 static void lpc47b272_init(device_t dev)
 {
 	struct superio_smsc_lpc47b272_config *conf = dev->chip_info;
@@ -138,18 +137,18 @@ static void lpc47b272_init(device_t dev)
 
 	if (!dev->enabled)
 		return;
-	
+
 	switch(dev->path.pnp.device) {
-	case LPC47B272_SP1: 
+	case LPC47B272_SP1:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com1);
 		break;
-		
+
 	case LPC47B272_SP2:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com2);
 		break;
-		
+
 	case LPC47B272_KBC:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		res1 = find_resource(dev, PNP_IDX_IO1);
@@ -159,65 +158,65 @@ static void lpc47b272_init(device_t dev)
 }
 
 /**********************************************************************************/
-/*								PRIVATE FUNCTIONS							      */
+/*                      	PRIVATE FUNCTIONS				  */
 /**********************************************************************************/
 
-//----------------------------------------------------------------------------------
-// Function:    	pnp_enter_conf_state
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Enable access to the LPC47B272's configuration registers.
-//
-static void pnp_enter_conf_state(device_t dev) 
+/*
+ * Function:    	pnp_enter_conf_state
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Enable access to the LPC47B272's configuration registers.
+ */
+static void pnp_enter_conf_state(device_t dev)
 {
 	outb(0x55, dev->path.pnp.port);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	pnp_exit_conf_state
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Disable access to the LPC47B272's configuration registers.
-//
-static void pnp_exit_conf_state(device_t dev) 
+/*
+ * Function:    	pnp_exit_conf_state
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Disable access to the LPC47B272's configuration registers.
+ */
+static void pnp_exit_conf_state(device_t dev)
 {
-    outb(0xaa, dev->path.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
 
 #if 0
-//----------------------------------------------------------------------------------
-// Function:    	dump_pnp_device
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Print the values of all of the LPC47B272's configuration registers.
-//					NOTE: The LPC47B272 must be in configuration mode when this
-//						  function is called.
-//
+/*
+ * Function:    	dump_pnp_device
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Print the values of all of the LPC47B272's configuration registers.
+ *			NOTE: The LPC47B272 must be in configuration mode when this
+ *			function is called.
+ */
 static void dump_pnp_device(device_t dev)
 {
-    int register_index;
-    print_debug("\r\n");
+	int register_index;
+	print_debug("\r\n");
 
-    for(register_index = 0; register_index <= LPC47B272_MAX_CONFIG_REGISTER; register_index++) {
-        uint8_t register_value;
+	for(register_index = 0; register_index <= LPC47B272_MAX_CONFIG_REGISTER; register_index++) {
+		uint8_t register_value;
 
-        if ((register_index & 0x0f) == 0) {
-                print_debug_hex8(register_index);
-                print_debug_char(':');
-        }
+		if ((register_index & 0x0f) == 0) {
+			print_debug_hex8(register_index);
+			print_debug_char(':');
+		}
 
-		// Skip over 'register' that would cause exit from configuration mode
-	    if (register_index == 0xaa)
+		/* Skip over 'register' that would cause exit from configuration mode */
+		if (register_index == 0xaa)
 			register_value = 0xaa;
 		else
-        	register_value = pnp_read_config(dev, register_index);
-
-        print_debug_char(' ');
-        print_debug_hex8(register_value);
-        if ((register_index & 0x0f) == 0x0f) {
-        	print_debug("\r\n");
-        }
-    }
+			register_value = pnp_read_config(dev, register_index);
+
+		print_debug_char(' ');
+		print_debug_hex8(register_value);
+		if ((register_index & 0x0f) == 0x0f) {
+			print_debug("\r\n");
+		}
+	}
 
    	print_debug("\r\n");
 }
diff --git a/src/superio/smsc/lpc47b397/Config.lb b/src/superio/smsc/lpc47b397/Config.lb
index f62a567d61..699d2c4b37 100644
--- a/src/superio/smsc/lpc47b397/Config.lb
+++ b/src/superio/smsc/lpc47b397/Config.lb
@@ -1,2 +1,24 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2000 AG Electronics Ltd.
+## Copyright (C) 2003-2004 Linux Networx
+## Copyright (C) 2004 Tyan
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
 config chip.h
 object superio.o
diff --git a/src/superio/smsc/lpc47b397/Makefile.inc b/src/superio/smsc/lpc47b397/Makefile.inc
index 79145f2697..ee66fa1204 100644
--- a/src/superio/smsc/lpc47b397/Makefile.inc
+++ b/src/superio/smsc/lpc47b397/Makefile.inc
@@ -1,2 +1,24 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2000 AG Electronics Ltd.
+## Copyright (C) 2003-2004 Linux Networx
+## Copyright (C) 2004 Tyan
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
 #config chip.h
 obj-$(CONFIG_SUPERIO_SMSC_LPC47B397) += superio.o
diff --git a/src/superio/smsc/lpc47b397/chip.h b/src/superio/smsc/lpc47b397/chip.h
index 4f6a06781f..321fd898f1 100644
--- a/src/superio/smsc/lpc47b397/chip.h
+++ b/src/superio/smsc/lpc47b397/chip.h
@@ -1,3 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2000 AG Electronics Ltd.
+ * Copyright (C) 2003-2004 Linux Networx
+ * Copyright (C) 2004 Tyan
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
 struct chip_operations;
 extern struct chip_operations superio_smsc_lpc47b397_ops;
 
diff --git a/src/superio/smsc/lpc47b397/lpc47b397.h b/src/superio/smsc/lpc47b397/lpc47b397.h
index c166659dfe..91bad4730c 100644
--- a/src/superio/smsc/lpc47b397/lpc47b397.h
+++ b/src/superio/smsc/lpc47b397/lpc47b397.h
@@ -1,3 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2000 AG Electronics Ltd.
+ * Copyright (C) 2003-2004 Linux Networx
+ * Copyright (C) 2004 Tyan
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
 #define LPC47B397_FDC		0	/* Floppy */
 #define LPC47B397_PP		3	/* Parallel Port */
 #define LPC47B397_SP1		4	/* Com1 */
diff --git a/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c b/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c
index 1ded9545d4..8b09e09a10 100644
--- a/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c
+++ b/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c
@@ -1,3 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2000 AG Electronics Ltd.
+ * Copyright (C) 2003-2004 Linux Networx
+ * Copyright (C) 2004 Tyan
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
 static void lpc47b397_gpio_offset_out(unsigned iobase, unsigned offset, unsigned value)
 {
 	outb(value,iobase+offset);
@@ -8,7 +30,7 @@ static unsigned lpc47b397_gpio_offset_in(unsigned iobase, unsigned offset)
 	return inb(iobase+offset);
 }
 
-//for GP60-GP64, GP66-GP85
+/* for GP60-GP64, GP66-GP85 */
 #define LPC47B397_GPIO_CNTL_INDEX 0x70
 #define LPC47B397_GPIO_CNTL_DATA 0x71
 
@@ -23,4 +45,3 @@ static unsigned lpc47b397_gpio_index_in(unsigned iobase, unsigned index)
 	outb(index,iobase+LPC47B397_GPIO_CNTL_INDEX);
 	return inb(iobase+LPC47B397_GPIO_CNTL_DATA);
 }
-
diff --git a/src/superio/smsc/lpc47b397/lpc47b397_early_serial.c b/src/superio/smsc/lpc47b397/lpc47b397_early_serial.c
index fb65626606..e81b6a0040 100644
--- a/src/superio/smsc/lpc47b397/lpc47b397_early_serial.c
+++ b/src/superio/smsc/lpc47b397/lpc47b397_early_serial.c
@@ -1,12 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2000 AG Electronics Ltd.
+ * Copyright (C) 2003-2004 Linux Networx
+ * Copyright (C) 2004 Tyan
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
 #include <arch/romcc_io.h>
 #include "lpc47b397.h"
 
-static inline void pnp_enter_conf_state(device_t dev) {
+static inline void pnp_enter_conf_state(device_t dev)
+{
 	unsigned port = dev>>8;
 	outb(0x55, port);
 }
 
-static void pnp_exit_conf_state(device_t dev) {
+static void pnp_exit_conf_state(device_t dev)
+{
 	unsigned port = dev>>8;
 	outb(0xaa, port);
 }
diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c
index 1849102dd1..0fbe048a8f 100644
--- a/src/superio/smsc/lpc47b397/superio.c
+++ b/src/superio/smsc/lpc47b397/superio.c
@@ -1,10 +1,25 @@
-/* Copyright 2000  AG Electronics Ltd. */
-/* Copyright 2003-2004 Linux Networx */
-/* Copyright 2004 Tyan
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2000 AG Electronics Ltd.
+ * Copyright (C) 2003-2004 Linux Networx
+ * Copyright (C) 2004 Tyan
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/* This code is distributed without warranty under the GPL v2 (see COPYING) */
-
 #include <arch/io.h>
 #include <device/device.h>
 #include <device/pnp.h>
@@ -18,11 +33,12 @@
 #include "chip.h"
 #include "lpc47b397.h"
 
-
-static void pnp_enter_conf_state(device_t dev) {
+static void pnp_enter_conf_state(device_t dev)
+{
 	outb(0x55, dev->path.pnp.port);
 }
-static void pnp_exit_conf_state(device_t dev) {
+static void pnp_exit_conf_state(device_t dev)
+{
 	outb(0xaa, dev->path.pnp.port);
 }
 
@@ -38,7 +54,8 @@ static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg)
 	return inb(port_base + 1);
 }
 
-static void enable_hwm_smbus(device_t dev) {
+static void enable_hwm_smbus(device_t dev)
+{
 	/* enable SensorBus register access */
 	uint8_t reg, value;
 	reg = 0xf0;
@@ -47,7 +64,6 @@ static void enable_hwm_smbus(device_t dev) {
 	pnp_write_config(dev, reg, value);
 }
 
-
 static void lpc47b397_init(device_t dev)
 {
 	struct superio_smsc_lpc47b397_config *conf;
@@ -71,29 +87,21 @@ static void lpc47b397_init(device_t dev)
 		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
 		break;
 	}
-
 }
 
 static void lpc47b397_pnp_set_resources(device_t dev)
 {
-
 	pnp_enter_conf_state(dev);
-
 	pnp_set_resources(dev);
-
 #if 0
 	dump_pnp_device(dev);
 #endif
-
 	pnp_exit_conf_state(dev);
-
 }
 
 static void lpc47b397_pnp_enable_resources(device_t dev)
 {
-
 	pnp_enter_conf_state(dev);
-
 	pnp_enable_resources(dev);
 
 	switch(dev->path.pnp.device) {
@@ -103,20 +111,15 @@ static void lpc47b397_pnp_enable_resources(device_t dev)
 		enable_hwm_smbus(dev);
 		break;
 	}
-
 #if 0
 	dump_pnp_device(dev);
 #endif
-
 	pnp_exit_conf_state(dev);
-
 }
 
 static void lpc47b397_pnp_enable(device_t dev)
 {
-
 	pnp_enter_conf_state(dev);
-
 	pnp_set_logical_device(dev);
 
 	if(dev->enabled) {
@@ -125,9 +128,7 @@ static void lpc47b397_pnp_enable(device_t dev)
 	else {
 		pnp_set_enable(dev, 0);
 	}
-
 	pnp_exit_conf_state(dev);
-
 }
 
 static struct device_operations ops = {
@@ -138,7 +139,6 @@ static struct device_operations ops = {
 	.init             = lpc47b397_init,
 };
 
-
 #define HWM_INDEX 0
 #define HWM_DATA  1
 #define SB_INDEX  0x0b
@@ -157,9 +157,9 @@ static int lsmbus_read_byte(device_t dev, uint8_t address)
 
 	res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0);
 
-	pnp_write_index(res->base+HWM_INDEX, 0, device); // why 0?
+	pnp_write_index(res->base+HWM_INDEX, 0, device); /* why 0? */
 
-	result = pnp_read_index(res->base+SB_INDEX, address); // we only read it one byte one time
+	result = pnp_read_index(res->base+SB_INDEX, address);  /* we only read it one byte one time */
 
 	return result;
 }
@@ -172,16 +172,16 @@ static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t val)
 	device = dev->path.i2c.device;
 	res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0);
 
-	pnp_write_index(res->base+HWM_INDEX, 0, device); // why 0?
+	pnp_write_index(res->base+HWM_INDEX, 0, device); /* why 0? */
 
-	pnp_write_index(res->base+SB_INDEX, address, val); // we only write it one byte one time
+	pnp_write_index(res->base+SB_INDEX, address, val); /* we only write it one byte one time */
 
 	return 0;
 }
 
 static struct smbus_bus_operations lops_smbus_bus = {
-//	.recv_byte  = lsmbus_recv_byte,
-//	.send_byte  = lsmbus_send_byte,
+	/* .recv_byte  = lsmbus_recv_byte, */
+	/* .send_byte  = lsmbus_send_byte, */
 	.read_byte  = lsmbus_read_byte,
 	.write_byte = lsmbus_write_byte,
 };
@@ -215,4 +215,3 @@ struct chip_operations superio_smsc_lpc47b397_ops = {
 	CHIP_NAME("SMSC LPC47B397 Super I/O")
 	.enable_dev = enable_dev,
 };
-
diff --git a/src/superio/smsc/lpc47m10x/Config.lb b/src/superio/smsc/lpc47m10x/Config.lb
index f62a567d61..3ac7b52764 100644
--- a/src/superio/smsc/lpc47m10x/Config.lb
+++ b/src/superio/smsc/lpc47m10x/Config.lb
@@ -1,2 +1,26 @@
+##
+## superio.c: RAM driver for SMSC LPC47M10X2 Super I/O chip
+##
+## Copyright 2000  AG Electronics Ltd.
+## Copyright 2003-2004 Linux Networx
+## Copyright 2004 Tyan
+## Copyright (C) 2005 Digital Design Corporation
+## Copyright (C) Ron Minnich, LANL
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+##
+
 config chip.h
 object superio.o
diff --git a/src/superio/smsc/lpc47m10x/Makefile.inc b/src/superio/smsc/lpc47m10x/Makefile.inc
index 8a51d63445..71fd06e23a 100644
--- a/src/superio/smsc/lpc47m10x/Makefile.inc
+++ b/src/superio/smsc/lpc47m10x/Makefile.inc
@@ -1,2 +1,26 @@
+##
+## superio.c: RAM driver for SMSC LPC47M10X2 Super I/O chip
+##
+## Copyright 2000  AG Electronics Ltd.
+## Copyright 2003-2004 Linux Networx
+## Copyright 2004 Tyan
+## Copyright (C) 2005 Digital Design Corporation
+## Copyright (C) Ron Minnich, LANL
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+##
+
 #config chip.h
 obj-$(CONFIG_SUPERIO_SMSC_LPC47M10X) += superio.o
diff --git a/src/superio/smsc/lpc47m10x/chip.h b/src/superio/smsc/lpc47m10x/chip.h
index ce63a53a28..57a8405dc5 100644
--- a/src/superio/smsc/lpc47m10x/chip.h
+++ b/src/superio/smsc/lpc47m10x/chip.h
@@ -1,3 +1,27 @@
+/*
+ * superio.c: RAM driver for SMSC LPC47M10X2 Super I/O chip
+ *
+ * Copyright 2000  AG Electronics Ltd.
+ * Copyright 2003-2004 Linux Networx
+ * Copyright 2004 Tyan
+ * Copyright (C) 2005 Digital Design Corporation
+ * Copyright (C) Ron Minnich, LANL
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
 struct chip_operations;
 extern struct chip_operations superio_smsc_lpc47m10x_ops;
 
diff --git a/src/superio/smsc/lpc47m10x/lpc47m10x.h b/src/superio/smsc/lpc47m10x/lpc47m10x.h
index 9f798713b5..0f9486d600 100644
--- a/src/superio/smsc/lpc47m10x/lpc47m10x.h
+++ b/src/superio/smsc/lpc47m10x/lpc47m10x.h
@@ -1,3 +1,27 @@
+/*
+ * superio.c: RAM driver for SMSC LPC47M10X2 Super I/O chip
+ *
+ * Copyright 2000  AG Electronics Ltd.
+ * Copyright 2003-2004 Linux Networx
+ * Copyright 2004 Tyan
+ * Copyright (C) 2005 Digital Design Corporation
+ * Copyright (C) Ron Minnich, LANL
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
 #define LPC47M10X2_FDC              0   /* Floppy */
 #define LPC47M10X2_PP               3   /* Parallel Port */
 #define LPC47M10X2_SP1              4   /* Com1 */
diff --git a/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c b/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c
index 70f7b20174..3d17d2d5cd 100644
--- a/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c
+++ b/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c
@@ -22,37 +22,39 @@
 #include <arch/romcc_io.h>
 #include "lpc47m10x.h"
 
-//----------------------------------------------------------------------------------
-// Function:    	pnp_enter_conf_state
-// Parameters:  	dev - high 8 bits = Super I/O port
-// Return Value:	None
-// Description: 	Enable access to the LPC47M10X2's configuration registers.
-//
-static inline void pnp_enter_conf_state(device_t dev) {
+/*
+ * Function:    	pnp_enter_conf_state
+ * Parameters:  	dev - high 8 bits = Super I/O port
+ * Return Value:	None
+ * Description: 	Enable access to the LPC47M10X2's configuration registers.
+ */
+static inline void pnp_enter_conf_state(device_t dev)
+{
 	unsigned port = dev>>8;
-    outb(0x55, port);
+	outb(0x55, port);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	pnp_exit_conf_state
-// Parameters:  	dev - high 8 bits = Super I/O port
-// Return Value:	None
-// Description: 	Disable access to the LPC47M10X2's configuration registers.
-//
-static void pnp_exit_conf_state(device_t dev) {
+/*
+ * Function:    	pnp_exit_conf_state
+ * Parameters:  	dev - high 8 bits = Super I/O port
+ * Return Value:	None
+ * Description: 	Disable access to the LPC47M10X2's configuration registers.
+ */
+static void pnp_exit_conf_state(device_t dev)
+{
 	unsigned port = dev>>8;
-    outb(0xaa, port);
+	outb(0xaa, port);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	lpc47b272_enable_serial
-// Parameters:  	dev - high 8 bits = Super I/O port, 
-//						  low 8 bits = logical device number (per lpc47b272.h)
-//					iobase - processor I/O port address to assign to this serial device
-// Return Value:	bool
-// Description: 	Configure the base I/O port of the specified serial device
-//					and enable the serial device.
-//
+/*
+ * Function:    	lpc47b272_enable_serial
+ * Parameters:  	dev - high 8 bits = Super I/O port,
+ *			      low 8 bits = logical device number (per lpc47b272.h)
+ *			iobase - processor I/O port address to assign to this serial device
+ * Return Value:	bool
+ * Description: 	Configure the base I/O port of the specified serial device
+ *			and enable the serial device.
+ */
 static void lpc47b272_enable_serial(device_t dev, unsigned iobase)
 {
 	pnp_enter_conf_state(dev);
diff --git a/src/superio/smsc/lpc47m10x/superio.c b/src/superio/smsc/lpc47m10x/superio.c
index 5bcb08dd26..535dc394b6 100644
--- a/src/superio/smsc/lpc47m10x/superio.c
+++ b/src/superio/smsc/lpc47m10x/superio.c
@@ -3,7 +3,7 @@
  *
  * Copyright 2000  AG Electronics Ltd.
  * Copyright 2003-2004 Linux Networx
- * Copyright 2004 Tyan 
+ * Copyright 2004 Tyan
  * Copyright (C) 2005 Digital Design Corporation
  * Copyright (C) Ron Minnich, LANL
  *
@@ -35,7 +35,7 @@
 #include "chip.h"
 #include "lpc47m10x.h"
 
-// Forward declarations
+/* Forward declarations */
 static void enable_dev(device_t dev);
 static void lpc47m10x_pnp_set_resources(device_t dev);
 static void lpc47m10x_pnp_enable_resources(device_t dev);
@@ -46,7 +46,6 @@ static void pnp_enter_conf_state(device_t dev);
 static void pnp_exit_conf_state(device_t dev);
 static void dump_pnp_device(device_t dev);
 
-
 struct chip_operations superio_smsc_lpc47m10x_ops = {
 	CHIP_NAME("SMSC LPC47M10x Super I/O")
 	.enable_dev = enable_dev
@@ -61,55 +60,55 @@ static struct device_operations ops = {
 };
 
 static struct pnp_info pnp_dev_info[] = {
-        { &ops, LPC47M10X2_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-        { &ops, LPC47M10X2_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-        { &ops, LPC47M10X2_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-        { &ops, LPC47M10X2_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-        { &ops, LPC47M10X2_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
+	{ &ops, LPC47M10X2_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	{ &ops, LPC47M10X2_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	{ &ops, LPC47M10X2_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, LPC47M10X2_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, LPC47M10X2_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
 };
 
 /**********************************************************************************/
-/*								PUBLIC INTERFACE								  */
+/*              		PUBLIC INTERFACE				  */
 /**********************************************************************************/
 
-//----------------------------------------------------------------------------------
-// Function:    	enable_dev
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Create device structures and allocate resources to devices 
-//					specified in the pnp_dev_info array (above).
-//
+/*
+ * Function:    	enable_dev
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Create device structures and allocate resources to devices
+ *			specified in the pnp_dev_info array (above).
+ */
 static void enable_dev(device_t dev)
 {
-	pnp_enable_devices(dev, &pnp_ops, 
-					   ARRAY_SIZE(pnp_dev_info), 
-					   pnp_dev_info);
+	pnp_enable_devices(dev, &pnp_ops,
+			   ARRAY_SIZE(pnp_dev_info),
+			   pnp_dev_info);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	lpc47m10x_pnp_set_resources
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Configure the specified Super I/O device with the resources
-//					(I/O space, etc.) that have been allocated for it.
-//
+/*
+ * Function:    	lpc47m10x_pnp_set_resources
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Configure the specified Super I/O device with the resources
+ *			(I/O space, etc.) that have been allocated for it.
+ */
 static void lpc47m10x_pnp_set_resources(device_t dev)
 {
-	pnp_enter_conf_state(dev);  
+	pnp_enter_conf_state(dev);
 	pnp_set_resources(dev);
-    pnp_exit_conf_state(dev);  
-}       
+	pnp_exit_conf_state(dev);
+}
 
 static void lpc47m10x_pnp_enable_resources(device_t dev)
-{       
+{
 	pnp_enter_conf_state(dev);
-    pnp_enable_resources(dev);
-    pnp_exit_conf_state(dev);
+	pnp_enable_resources(dev);
+	pnp_exit_conf_state(dev);
 }
 
 static void lpc47m10x_pnp_enable(device_t dev)
 {
-	pnp_enter_conf_state(dev);   
+	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
 
 	if(dev->enabled) {
@@ -118,17 +117,17 @@ static void lpc47m10x_pnp_enable(device_t dev)
 	else {
 		pnp_set_enable(dev, 0);
 	}
-	pnp_exit_conf_state(dev);  
+	pnp_exit_conf_state(dev);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	lpc47m10x_init
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Initialize the specified Super I/O device.
-//					Devices other than COM ports and the keyboard controller are 
-//					ignored. For COM ports, we configure the baud rate. 
-//
+/*
+ * Function:    	lpc47m10x_init
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Initialize the specified Super I/O device.
+ *			Devices other than COM ports and the keyboard controller are
+ *			ignored. For COM ports, we configure the baud rate.
+ */
 static void lpc47m10x_init(device_t dev)
 {
 	struct superio_smsc_lpc47m10x_config *conf = dev->chip_info;
@@ -136,18 +135,18 @@ static void lpc47m10x_init(device_t dev)
 
 	if (!dev->enabled)
 		return;
-	
+
 	switch(dev->path.pnp.device) {
-	case LPC47M10X2_SP1: 
+	case LPC47M10X2_SP1:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com1);
 		break;
-		
+
 	case LPC47M10X2_SP2:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com2);
 		break;
-		
+
 	case LPC47M10X2_KBC:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		res1 = find_resource(dev, PNP_IDX_IO1);
@@ -157,65 +156,65 @@ static void lpc47m10x_init(device_t dev)
 }
 
 /**********************************************************************************/
-/*								PRIVATE FUNCTIONS							      */
+/*      			PRIVATE FUNCTIONS				  */
 /**********************************************************************************/
 
-//----------------------------------------------------------------------------------
-// Function:    	pnp_enter_conf_state
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Enable access to the LPC47M10X2's configuration registers.
-//
-static void pnp_enter_conf_state(device_t dev) 
+/*
+ * Function:    	pnp_enter_conf_state
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Enable access to the LPC47M10X2's configuration registers.
+ */
+static void pnp_enter_conf_state(device_t dev)
 {
 	outb(0x55, dev->path.pnp.port);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	pnp_exit_conf_state
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Disable access to the LPC47M10X2's configuration registers.
-//
-static void pnp_exit_conf_state(device_t dev) 
+/*
+ * Function:    	pnp_exit_conf_state
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Disable access to the LPC47M10X2's configuration registers.
+ */
+static void pnp_exit_conf_state(device_t dev)
 {
-    outb(0xaa, dev->path.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
 
 #if 0
-//----------------------------------------------------------------------------------
-// Function:    	dump_pnp_device
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Print the values of all of the LPC47M10X2's configuration registers.
-//					NOTE: The LPC47M10X2 must be in configuration mode when this
-//						  function is called.
-//
+/*
+ * Function:    	dump_pnp_device
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Print the values of all of the LPC47M10X2's configuration registers.
+ *			NOTE: The LPC47M10X2 must be in configuration mode when this
+ *			function is called.
+ */
 static void dump_pnp_device(device_t dev)
 {
-    int register_index;
-    print_debug("\r\n");
+	int register_index;
+	print_debug("\r\n");
 
-    for(register_index = 0; register_index <= LPC47M10X2_MAX_CONFIG_REGISTER; register_index++) {
-        uint8_t register_value;
+	for(register_index = 0; register_index <= LPC47M10X2_MAX_CONFIG_REGISTER; register_index++) {
+		uint8_t register_value;
 
-        if ((register_index & 0x0f) == 0) {
-                print_debug_hex8(register_index);
-                print_debug_char(':');
-        }
+		if ((register_index & 0x0f) == 0) {
+			print_debug_hex8(register_index);
+			print_debug_char(':');
+		}
 
-		// Skip over 'register' that would cause exit from configuration mode
-	    if (register_index == 0xaa)
+		/* Skip over 'register' that would cause exit from configuration mode */
+		if (register_index == 0xaa)
 			register_value = 0xaa;
 		else
-        	register_value = pnp_read_config(dev, register_index);
-
-        print_debug_char(' ');
-        print_debug_hex8(register_value);
-        if ((register_index & 0x0f) == 0x0f) {
-        	print_debug("\r\n");
-        }
-    }
+			register_value = pnp_read_config(dev, register_index);
+
+		print_debug_char(' ');
+		print_debug_hex8(register_value);
+		if ((register_index & 0x0f) == 0x0f) {
+			print_debug("\r\n");
+		}
+	}
 
    	print_debug("\r\n");
 }
diff --git a/src/superio/smsc/lpc47m15x/Makefile.inc b/src/superio/smsc/lpc47m15x/Makefile.inc
index 25967e4013..37ee88ee0f 100644
--- a/src/superio/smsc/lpc47m15x/Makefile.inc
+++ b/src/superio/smsc/lpc47m15x/Makefile.inc
@@ -1,2 +1,21 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2009 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
 #config chip.h
 obj-$(CONFIG_SUPERIO_SMSC_LPC47M15X) += superio.o
diff --git a/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c b/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c
index 85ee7222d8..dda759731b 100644
--- a/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c
+++ b/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c
@@ -28,7 +28,8 @@ static inline void pnp_enter_conf_state(device_t dev)
 	outb(0x55, port);
 }
 
-static void pnp_exit_conf_state(device_t dev) {
+static void pnp_exit_conf_state(device_t dev)
+{
 	unsigned port = dev>>8;
 	outb(0xaa, port);
 }
diff --git a/src/superio/smsc/lpc47m15x/superio.c b/src/superio/smsc/lpc47m15x/superio.c
index 6851279525..28bbcfdaf2 100644
--- a/src/superio/smsc/lpc47m15x/superio.c
+++ b/src/superio/smsc/lpc47m15x/superio.c
@@ -32,7 +32,7 @@
 #include "chip.h"
 #include "lpc47m15x.h"
 
-// Forward declarations
+/* Forward declarations */
 static void enable_dev(device_t dev);
 static void lpc47m15x_pnp_set_resources(device_t dev);
 static void lpc47m15x_pnp_enable_resources(device_t dev);
@@ -43,7 +43,6 @@ static void pnp_enter_conf_state(device_t dev);
 static void pnp_exit_conf_state(device_t dev);
 static void dump_pnp_device(device_t dev);
 
-
 struct chip_operations superio_smsc_lpc47m15x_ops = {
 	CHIP_NAME("SMSC LPC47M15x/192/997 Super I/O")
 	.enable_dev = enable_dev
@@ -58,11 +57,11 @@ static struct device_operations ops = {
 };
 
 static struct pnp_info pnp_dev_info[] = {
-        { &ops, LPC47M15X_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-        { &ops, LPC47M15X_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-        { &ops, LPC47M15X_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-        { &ops, LPC47M15X_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-        { &ops, LPC47M15X_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
+	{ &ops, LPC47M15X_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	{ &ops, LPC47M15X_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	{ &ops, LPC47M15X_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, LPC47M15X_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, LPC47M15X_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
 };
 
 static void enable_dev(device_t dev)
@@ -72,13 +71,13 @@ static void enable_dev(device_t dev)
 
 static void lpc47m15x_pnp_set_resources(device_t dev)
 {
-	pnp_enter_conf_state(dev);  
+	pnp_enter_conf_state(dev);
 	pnp_set_resources(dev);
-	pnp_exit_conf_state(dev);  
-}       
+	pnp_exit_conf_state(dev);
+}
 
 static void lpc47m15x_pnp_enable_resources(device_t dev)
-{       
+{
 	pnp_enter_conf_state(dev);
 	pnp_enable_resources(dev);
 	pnp_exit_conf_state(dev);
@@ -86,7 +85,7 @@ static void lpc47m15x_pnp_enable_resources(device_t dev)
 
 static void lpc47m15x_pnp_enable(device_t dev)
 {
-	pnp_enter_conf_state(dev);   
+	pnp_enter_conf_state(dev);
 	pnp_set_logical_device(dev);
 
 	if(dev->enabled) {
@@ -95,7 +94,7 @@ static void lpc47m15x_pnp_enable(device_t dev)
 	else {
 		pnp_set_enable(dev, 0);
 	}
-	pnp_exit_conf_state(dev);  
+	pnp_exit_conf_state(dev);
 }
 
 static void lpc47m15x_init(device_t dev)
@@ -105,18 +104,18 @@ static void lpc47m15x_init(device_t dev)
 
 	if (!dev->enabled)
 		return;
-	
+
 	switch(dev->path.pnp.device) {
-	case LPC47M15X_SP1: 
+	case LPC47M15X_SP1:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com1);
 		break;
-		
+
 	case LPC47M15X_SP2:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com2);
 		break;
-		
+
 	case LPC47M15X_KBC:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		res1 = find_resource(dev, PNP_IDX_IO1);
@@ -125,13 +124,12 @@ static void lpc47m15x_init(device_t dev)
 	}
 }
 
-static void pnp_enter_conf_state(device_t dev) 
+static void pnp_enter_conf_state(device_t dev)
 {
 	outb(0x55, dev->path.pnp.port);
 }
 
-static void pnp_exit_conf_state(device_t dev) 
+static void pnp_exit_conf_state(device_t dev)
 {
-    outb(0xaa, dev->path.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
-
diff --git a/src/superio/smsc/lpc47n217/Config.lb b/src/superio/smsc/lpc47n217/Config.lb
index 67c0dfd1b4..5a15d159ae 100644
--- a/src/superio/smsc/lpc47n217/Config.lb
+++ b/src/superio/smsc/lpc47n217/Config.lb
@@ -1,22 +1,22 @@
-## 
+##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2005 Digital Design Corporation
-## 
+##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
-## 
+##
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
-## 
+##
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-## 
+##
 
 config chip.h
 object superio.o
diff --git a/src/superio/smsc/lpc47n217/Makefile.inc b/src/superio/smsc/lpc47n217/Makefile.inc
index fa7729d809..10710b9080 100644
--- a/src/superio/smsc/lpc47n217/Makefile.inc
+++ b/src/superio/smsc/lpc47n217/Makefile.inc
@@ -1,22 +1,22 @@
-## 
+##
 ## This file is part of the coreboot project.
-## 
+##
 ## Copyright (C) 2005 Digital Design Corporation
-## 
+##
 ## This program is free software; you can redistribute it and/or modify
 ## it under the terms of the GNU General Public License as published by
 ## the Free Software Foundation; either version 2 of the License, or
 ## (at your option) any later version.
-## 
+##
 ## This program is distributed in the hope that it will be useful,
 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.
-## 
+##
 ## You should have received a copy of the GNU General Public License
 ## along with this program; if not, write to the Free Software
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-## 
+##
 
 #config chip.h
 obj-$(CONFIG_SUPERIO_SMSC_LPC47N217) += superio.o
diff --git a/src/superio/smsc/lpc47n217/lpc47n217.h b/src/superio/smsc/lpc47n217/lpc47n217.h
index c52ca521eb..3795821129 100644
--- a/src/superio/smsc/lpc47n217/lpc47n217.h
+++ b/src/superio/smsc/lpc47n217/lpc47n217.h
@@ -18,8 +18,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-// These are arbitrary, but must match declarations in the mainboard config file.
-// Values chosen to match SMSC 47B37x.
+/* These are arbitrary, but must match declarations in the mainboard config file.
+ * Values chosen to match SMSC 47B37x.
+ */
 
 #define LPC47N217_PP               3   /* Parallel Port */
 #define LPC47N217_SP1              4   /* Com1 */
diff --git a/src/superio/smsc/lpc47n217/lpc47n217_early_serial.c b/src/superio/smsc/lpc47n217/lpc47n217_early_serial.c
index f60dbcffe1..2b0c634bcf 100644
--- a/src/superio/smsc/lpc47n217/lpc47n217_early_serial.c
+++ b/src/superio/smsc/lpc47n217/lpc47n217_early_serial.c
@@ -24,123 +24,126 @@
 #include <assert.h>
 #include "lpc47n217.h"
 
-//----------------------------------------------------------------------------------
-// Function:    	pnp_enter_conf_state
-// Parameters:  	dev - high 8 bits = Super I/O port
-// Return Value:	None
-// Description: 	Enable access to the LPC47N217's configuration registers.
-//
-static inline void pnp_enter_conf_state(device_t dev) {
+/*
+ * Function:    	pnp_enter_conf_state
+ * Parameters:  	dev - high 8 bits = Super I/O port
+ * Return Value:	None
+ * Description:		Enable access to the LPC47N217's configuration registers.
+ */
+static inline void pnp_enter_conf_state(device_t dev)
+{
 	unsigned port = dev>>8;
-    outb(0x55, port);
+	outb(0x55, port);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	pnp_exit_conf_state
-// Parameters:  	dev - high 8 bits = Super I/O port
-// Return Value:	None
-// Description: 	Disable access to the LPC47N217's configuration registers.
-//
-static void pnp_exit_conf_state(device_t dev) {
+/*
+ * Function:		pnp_exit_conf_state
+ * Parameters:		dev - high 8 bits = Super I/O port
+ * Return Value:	None
+ * Description:		Disable access to the LPC47N217's configuration registers.
+ */
+static void pnp_exit_conf_state(device_t dev)
+{
 	unsigned port = dev>>8;
-    outb(0xaa, port);
+	outb(0xaa, port);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	lpc47n217_pnp_set_iobase
-// Parameters:  	dev - high 8 bits = Super I/O port, 
-//						  low 8 bits = logical device number (per lpc47n217.h)
-//					iobase - base I/O port for the logical device
-// Return Value:	None
-// Description: 	Program the base I/O port for the specified logical device.
-//
+/*
+ * Function:	lpc47n217_pnp_set_iobase
+ * Parameters:	dev - high 8 bits = Super I/O port,
+ *		      low 8 bits = logical device number (per lpc47n217.h)
+ *		iobase - base I/O port for the logical device
+ * Return Value:None
+ * Description:	Program the base I/O port for the specified logical device.
+ *
+ */
 void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase)
 {
-	// LPC47N217 requires base ports to be a multiple of 4
+	/* LPC47N217 requires base ports to be a multiple of 4 */
 	ASSERT(!(iobase & 0x3));
 
 	switch(dev & 0xFF) {
-	case LPC47N217_PP: 
+	case LPC47N217_PP:
 		pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
 		break;
-		
-	case LPC47N217_SP1: 
+
+	case LPC47N217_SP1:
 		pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
 		break;
-		
+
 	case LPC47N217_SP2:
 		pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
 		break;
-		
+
 	default:
 		break;
 	}
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	lpc47n217_pnp_set_enable
-// Parameters:  	dev - high 8 bits = Super I/O port, 
-//						  low 8 bits = logical device number (per lpc47n217.h)
-//					enable - 0 to disable, anythig else to enable
-// Return Value:	None
-// Description: 	Enable or disable the specified logical device.
-//					Technically, a full disable requires setting the device's base
-//					I/O port below 0x100. We don't do that here, because we don't
-//					have access to a data structure that specifies what the 'real'
-//					base port is (when asked to enable the device). Also the function
-//					is used only to disable the device while its true base port is
-//					programmed (see lpc47n217_enable_serial() below).
-//
+/*
+ * Function:	lpc47n217_pnp_set_enable
+ * Parameters:	dev - high 8 bits = Super I/O port,
+ *		      low 8 bits = logical device number (per lpc47n217.h)
+ *		enable - 0 to disable, anythig else to enable
+ * Return Value:None
+ * Description:	Enable or disable the specified logical device.
+ *		Technically, a full disable requires setting the device's base
+ *		I/O port below 0x100. We don't do that here, because we don't
+ *		have access to a data structure that specifies what the 'real'
+ *		base port is (when asked to enable the device). Also the function
+ *		is used only to disable the device while its true base port is
+ *		programmed (see lpc47n217_enable_serial() below).
+ */
 void lpc47n217_pnp_set_enable(device_t dev, int enable)
 {
 	uint8_t power_register = 0;
 	uint8_t power_mask = 0;
 	uint8_t current_power;
 	uint8_t new_power;
-	
+
 	switch(dev & 0xFF) {
-	case LPC47N217_PP: 
+	case LPC47N217_PP:
 		power_register = 0x01;
 		power_mask = 0x04;
 		break;
-		
-	case LPC47N217_SP1: 
+
+	case LPC47N217_SP1:
 		power_register = 0x02;
 		power_mask = 0x08;
 		break;
-		
+
 	case LPC47N217_SP2:
 		power_register = 0x02;
 		power_mask = 0x80;
 		break;
-		
+
 	default:
 		return;
 	}
 
 	current_power = pnp_read_config(dev, power_register);
-	new_power = current_power & ~power_mask;		// disable by default
+	new_power = current_power & ~power_mask;	/* disable by default */
 
 	if (enable)
-		new_power |= power_mask;		// Enable
+		new_power |= power_mask;		/* Enable */
 
 	pnp_write_config(dev, power_register, new_power);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	lpc47n217_enable_serial
-// Parameters:  	dev - high 8 bits = Super I/O port, 
-//						  low 8 bits = logical device number (per lpc47n217.h)
-//					iobase - processor I/O port address to assign to this serial device
-// Return Value:	bool
-// Description: 	Configure the base I/O port of the specified serial device
-//					and enable the serial device.
-//
+/*
+ * Function:	lpc47n217_enable_serial
+ * Parameters:	dev - high 8 bits = Super I/O port,
+ *		      low 8 bits = logical device number (per lpc47n217.h)
+ *		iobase - processor I/O port address to assign to this serial device
+ * Return Value:bool
+ * Description:	Configure the base I/O port of the specified serial device
+ *		and enable the serial device.
+ */
 static void lpc47n217_enable_serial(device_t dev, unsigned iobase)
 {
-	// NOTE: Cannot use pnp_set_XXX() here because they assume chip
-	//		 support for logical devices, which the LPC47N217 doesn't have
-	
+	/* NOTE: Cannot use pnp_set_XXX() here because they assume chip
+	 * support for logical devices, which the LPC47N217 doesn't have*/
+
 	pnp_enter_conf_state(dev);
 	lpc47n217_pnp_set_enable(dev, 0);
 	lpc47n217_pnp_set_iobase(dev, iobase);
diff --git a/src/superio/smsc/lpc47n217/superio.c b/src/superio/smsc/lpc47n217/superio.c
index 90a3be1a8c..b83fe6cf6d 100644
--- a/src/superio/smsc/lpc47n217/superio.c
+++ b/src/superio/smsc/lpc47n217/superio.c
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 2000 AG Electronics Ltd.
  * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan 
+ * Copyright (C) 2004 Tyan
  * Copyright (C) 2005 Digital Design Corporation
  *
  * This program is free software; you can redistribute it and/or modify
@@ -37,7 +37,7 @@
 #include "chip.h"
 #include "lpc47n217.h"
 
-// Forward declarations
+/* Forward declarations */
 static void enable_dev(device_t dev);
 static void lpc47n217_pnp_set_resources(device_t dev);
 static void lpc47n217_pnp_enable_resources(device_t dev);
@@ -53,7 +53,6 @@ static void lpc47n217_pnp_set_enable(device_t dev, int enable);
 static void pnp_enter_conf_state(device_t dev);
 static void pnp_exit_conf_state(device_t dev);
 
-
 struct chip_operations superio_smsc_lpc47n217_ops = {
 	CHIP_NAME("SMSC LPC47N217 Super I/O")
 	.enable_dev = enable_dev,
@@ -68,69 +67,72 @@ static struct device_operations ops = {
 };
 
 static struct pnp_info pnp_dev_info[] = {
-        { &ops, LPC47N217_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-        { &ops, LPC47N217_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-        { &ops, LPC47N217_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }
+	{ &ops, LPC47N217_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+	{ &ops, LPC47N217_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+	{ &ops, LPC47N217_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }
 };
 
 /**********************************************************************************/
-/*								PUBLIC INTERFACE								  */
+/*			PUBLIC INTERFACE					  */
 /**********************************************************************************/
 
-//----------------------------------------------------------------------------------
-// Function:    	enable_dev
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Create device structures and allocate resources to devices 
-//					specified in the pnp_dev_info array (above).
-//
+/*
+ * Function:    	enable_dev
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Create device structures and allocate resources to devices
+ *			specified in the pnp_dev_info array (above).
+ */
 static void enable_dev(device_t dev)
 {
-	pnp_enable_devices(dev, &pnp_ops, 
-					   ARRAY_SIZE(pnp_dev_info), 
-					   pnp_dev_info);
+	pnp_enable_devices(dev, &pnp_ops,
+			   ARRAY_SIZE(pnp_dev_info),
+			   pnp_dev_info);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	lpc47n217_pnp_set_resources
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Configure the specified Super I/O device with the resources
-//					(I/O space, etc.) that have been allocate for it.
-//
+/*
+ * Function:    	lpc47n217_pnp_set_resources
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Configure the specified Super I/O device with the resources
+ *			(I/O space, etc.) that have been allocate for it.
+ */
 static void lpc47n217_pnp_set_resources(device_t dev)
 {
 	int i;
-	
-	pnp_enter_conf_state(dev);  
 
-	// NOTE: Cannot use pnp_set_resources() here because it assumes chip
-	//		 support for logical devices, which the LPC47N217 doesn't have
+	pnp_enter_conf_state(dev);
+
+	/* NOTE: Cannot use pnp_set_resources() here because it assumes chip
+	 * support for logical devices, which the LPC47N217 doesn't have
+	 */
 	for(i = 0; i < dev->resources; i++)
 		lpc47n217_pnp_set_resource(dev, &dev->resource[i]);
 
-//	dump_pnp_device(dev);
-                
-   	pnp_exit_conf_state(dev);  
-}       
+	/* dump_pnp_device(dev); */
+
+   	pnp_exit_conf_state(dev);
+}
 
 static void lpc47n217_pnp_enable_resources(device_t dev)
-{       
-    pnp_enter_conf_state(dev);
+{
+	pnp_enter_conf_state(dev);
 
-	// NOTE: Cannot use pnp_enable_resources() here because it assumes chip
-	//		 support for logical devices, which the LPC47N217 doesn't have
-    lpc47n217_pnp_set_enable(dev, 1);
+	/* NOTE: Cannot use pnp_enable_resources() here because it assumes chip
+	 * support for logical devices, which the LPC47N217 doesn't have
+	 */
+	lpc47n217_pnp_set_enable(dev, 1);
 
-    pnp_exit_conf_state(dev);
+	pnp_exit_conf_state(dev);
 }
 
 static void lpc47n217_pnp_enable(device_t dev)
 {
-	pnp_enter_conf_state(dev);   
+	pnp_enter_conf_state(dev);
 
-	// NOTE: Cannot use pnp_set_enable() here because it assumes chip
-	//		 support for logical devices, which the LPC47N217 doesn't have
+	/* NOTE: Cannot use pnp_set_enable() here because it assumes chip
+	 * support for logical devices, which the LPC47N217 doesn't have
+	 */
 
 	if(dev->enabled) {
 		lpc47n217_pnp_set_enable(dev, 1);
@@ -139,17 +141,17 @@ static void lpc47n217_pnp_enable(device_t dev)
 		lpc47n217_pnp_set_enable(dev, 0);
 	}
 
-	pnp_exit_conf_state(dev);  
+	pnp_exit_conf_state(dev);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	lpc47n217_init
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Initialize the specified Super I/O device.
-//					Devices other than COM ports are ignored.
-//					For COM ports, we configure the baud rate. 
-//
+/*
+ * Function:    	lpc47n217_init
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Initialize the specified Super I/O device.
+ *			Devices other than COM ports are ignored.
+ *			For COM ports, we configure the baud rate.
+ */
 static void lpc47n217_init(device_t dev)
 {
 	struct superio_smsc_lpc47n217_config* conf = dev->chip_info;
@@ -159,7 +161,7 @@ static void lpc47n217_init(device_t dev)
 		return;
 
 	switch(dev->path.pnp.device) {
-	case LPC47N217_SP1: 
+	case LPC47N217_SP1:
 		res0 = find_resource(dev, PNP_IDX_IO0);
 		init_uart8250(res0->base, &conf->com1);
 		break;
@@ -171,9 +173,8 @@ static void lpc47n217_init(device_t dev)
 	}
 }
 
-
 /**********************************************************************************/
-/*								PRIVATE FUNCTIONS							      */
+/*      			PRIVATE FUNCTIONS				  */
 /**********************************************************************************/
 
 static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource)
@@ -185,8 +186,9 @@ static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource)
 	}
 
 	/* Now store the resource */
-	// NOTE: Cannot use pnp_set_XXX() here because they assume chip
-	//		 support for logical devices, which the LPC47N217 doesn't have
+	/* NOTE: Cannot use pnp_set_XXX() here because they assume chip
+	 * support for logical devices, which the LPC47N217 doesn't have
+	 */
 
 	if (resource->flags & IORESOURCE_IO) {
 		lpc47n217_pnp_set_iobase(dev, resource->base);
@@ -210,20 +212,20 @@ static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource)
 static void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase)
 {
 	ASSERT(!(iobase & 0x3));
-	
+
 	switch(dev->path.pnp.device) {
-	case LPC47N217_PP: 
+	case LPC47N217_PP:
 		pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
 		break;
-		
-	case LPC47N217_SP1: 
+
+	case LPC47N217_SP1:
 		pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
 		break;
-		
+
 	case LPC47N217_SP2:
 		pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
 		break;
-		
+
 	default:
 		BUG();
 		break;
@@ -238,7 +240,7 @@ static void lpc47n217_pnp_set_drq(device_t dev, unsigned drq)
 		uint8_t current_config = pnp_read_config(dev, PP_DMA_SELECTION_REGISTER);
 		uint8_t new_config;
 
-		ASSERT(!(drq & ~PP_DMA_MASK));		// DRQ out of range??		
+		ASSERT(!(drq & ~PP_DMA_MASK));		/* DRQ out of range?? */
 		new_config = (current_config & ~PP_DMA_MASK) | drq;
 		pnp_write_config(dev, PP_DMA_SELECTION_REGISTER, new_config);
 	} else {
@@ -252,31 +254,31 @@ static void lpc47n217_pnp_set_irq(device_t dev, unsigned irq)
 	uint8_t irq_config_mask = 0;
 	uint8_t current_config;
 	uint8_t new_config;
-	
+
 	switch(dev->path.pnp.device) {
-	case LPC47N217_PP: 
+	case LPC47N217_PP:
 		irq_config_register = 0x27;
 		irq_config_mask = 0x0F;
 		break;
-		
-	case LPC47N217_SP1: 
+
+	case LPC47N217_SP1:
 		irq_config_register = 0x28;
 		irq_config_mask = 0xF0;
 		irq <<= 4;
 		break;
-		
+
 	case LPC47N217_SP2:
 		irq_config_register = 0x28;
 		irq_config_mask = 0x0F;
 		break;
-		
+
 	default:
 		BUG();
 		return;
 	}
 
-	ASSERT(!(irq & ~irq_config_mask));		// IRQ out of range??
-	
+	ASSERT(!(irq & ~irq_config_mask));		/* IRQ out of range?? */
+
 	current_config = pnp_read_config(dev, irq_config_register);
 	new_config = (current_config & ~irq_config_mask) | irq;
 	pnp_write_config(dev, irq_config_register, new_config);
@@ -288,100 +290,99 @@ static void lpc47n217_pnp_set_enable(device_t dev, int enable)
 	uint8_t power_mask = 0;
 	uint8_t current_power;
 	uint8_t new_power;
-	
+
 	switch(dev->path.pnp.device) {
-	case LPC47N217_PP: 
+	case LPC47N217_PP:
 		power_register = 0x01;
 		power_mask = 0x04;
 		break;
-		
-	case LPC47N217_SP1: 
+
+	case LPC47N217_SP1:
 		power_register = 0x02;
 		power_mask = 0x08;
 		break;
-		
+
 	case LPC47N217_SP2:
 		power_register = 0x02;
 		power_mask = 0x80;
 		break;
-		
+
 	default:
 		BUG();
 		return;
 	}
 
 	current_power = pnp_read_config(dev, power_register);
-	new_power = current_power & ~power_mask;		// disable by default
+	new_power = current_power & ~power_mask;		/* disable by default */
 
 	if (enable) {
 		struct resource* ioport_resource = find_resource(dev, PNP_IDX_IO0);
 		lpc47n217_pnp_set_iobase(dev, ioport_resource->base);
-		
-		new_power |= power_mask;		// Enable
-		
-    } else {
+
+		new_power |= power_mask;		/* Enable */
+
+	} else {
 		lpc47n217_pnp_set_iobase(dev, 0);
 	}
 	pnp_write_config(dev, power_register, new_power);
 }
 
-
-//----------------------------------------------------------------------------------
-// Function:    	pnp_enter_conf_state
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Enable access to the LPC47N217's configuration registers.
-//
-static void pnp_enter_conf_state(device_t dev) 
+/*
+ * Function:    	pnp_enter_conf_state
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Enable access to the LPC47N217's configuration registers.
+ */
+static void pnp_enter_conf_state(device_t dev)
 {
 	outb(0x55, dev->path.pnp.port);
 }
 
-//----------------------------------------------------------------------------------
-// Function:    	pnp_exit_conf_state
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Disable access to the LPC47N217's configuration registers.
-//
-static void pnp_exit_conf_state(device_t dev) 
+/*
+ * Function:    	pnp_exit_conf_state
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Disable access to the LPC47N217's configuration registers.
+ */
+static void pnp_exit_conf_state(device_t dev)
 {
-    outb(0xaa, dev->path.pnp.port);
+	outb(0xaa, dev->path.pnp.port);
 }
 
 #if 0
-//----------------------------------------------------------------------------------
-// Function:    	dump_pnp_device
-// Parameters:  	dev - pointer to structure describing a Super I/O device 
-// Return Value:	None
-// Description: 	Print the values of all of the LPC47N217's configuration registers.
-//					NOTE: The LPC47N217 must be in configuration mode when this
-//						  function is called.
-//
+/*
+ * Function:    	dump_pnp_device
+ * Parameters:  	dev - pointer to structure describing a Super I/O device
+ * Return Value:	None
+ * Description: 	Print the values of all of the LPC47N217's configuration registers.
+ *			NOTE: The LPC47N217 must be in configuration mode when this
+ *			function is called.
+ */
 static void dump_pnp_device(device_t dev)
 {
-    int register_index;
-    print_debug("\r\n");
+	int register_index;
+	print_debug("\r\n");
 
-    for(register_index = 0; register_index <= LPC47N217_MAX_CONFIG_REGISTER; register_index++) {
-        uint8_t register_value;
+	for(register_index = 0; register_index <= LPC47N217_MAX_CONFIG_REGISTER; register_index++) {
+		uint8_t register_value;
 
-        if ((register_index & 0x0f) == 0) {
-                print_debug_hex8(register_index);
-                print_debug_char(':');
-        }
+		if ((register_index & 0x0f) == 0) {
+			print_debug_hex8(register_index);
+			print_debug_char(':');
+		}
 
-		// Skip over 'register' that would cause exit from configuration mode
-	    if (register_index == 0xaa)
+		/* Skip over 'register' that would cause exit from configuration mode */
+		if (register_index == 0xaa)
 			register_value = 0xaa;
 		else
-        	register_value = pnp_read_config(dev, register_index);
-
-        print_debug_char(' ');
-        print_debug_hex8(register_value);
-        if ((register_index & 0x0f) == 0x0f) {
-        	print_debug("\r\n");
-        }
-    }
+			register_value = pnp_read_config(dev, register_index);
+
+		print_debug_char(' ');
+		print_debug_hex8(register_value);
+		if ((register_index & 0x0f) == 0x0f) {
+			print_debug("\r\n");
+		}
+	}
 
    	print_debug("\r\n");
 }
diff --git a/src/superio/smsc/smscsuperio/Config.lb b/src/superio/smsc/smscsuperio/Config.lb
index cb5d059b59..512a218623 100644
--- a/src/superio/smsc/smscsuperio/Config.lb
+++ b/src/superio/smsc/smscsuperio/Config.lb
@@ -20,4 +20,3 @@
 
 config chip.h
 object superio.o
-
diff --git a/src/superio/smsc/smscsuperio/Makefile.inc b/src/superio/smsc/smscsuperio/Makefile.inc
index f1e24ab9de..7aa10532bd 100644
--- a/src/superio/smsc/smscsuperio/Makefile.inc
+++ b/src/superio/smsc/smscsuperio/Makefile.inc
@@ -20,4 +20,3 @@
 
 #config chip.h
 obj-$(CONFIG_SUPERIO_SMSC_SMSCSUPERIO) += superio.o
-
diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c
index 7bc12a4fa5..ffbf82ae42 100644
--- a/src/superio/smsc/smscsuperio/superio.c
+++ b/src/superio/smsc/smscsuperio/superio.c
@@ -120,7 +120,7 @@ static const struct logical_devices {
 	uint8_t superio_id;
 	int devs[MAX_LOGICAL_DEVICES];
 } logical_device_table[] = {
-	// Chip   FDC PP SP1 SP2 RTC KBC AUX XBUS HWM GAME PME MPU RT ACPI SMB
+	/* Chip   FDC PP SP1 SP2 RTC KBC AUX XBUS HWM GAME PME MPU RT ACPI SMB */
 	{LPC47M172,{0, 3, 4,  2, -1,  7, -1,  -1, -1,  -1, -1, -1, 10, -1, -1}},
 	{FDC37B80X,{0, 3, 4,  5, -1,  7,  8,  -1, -1,  -1, -1, -1, -1, -1, -1}},
 	{FDC37B78X,{0, 3, 4,  5,  6,  7,  8,  -1, -1,  -1, -1, -1, -1, 10, -1}},