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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-15 19:35:14 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-11-15 19:35:14 +0000 |
| commit | a69d978be8a068944466e776de87527fb104a878 (patch) | |
| tree | 8acf4247e3104ad9ccb940568a81e472105a674b /src/superio/winbond/w83627dhg | |
| parent | 2e9323e5bef293c051d9fd982214e6db2e3305ee (diff) | |
| download | coreboot-a69d978be8a068944466e776de87527fb104a878.tar.xz | |
C and other Super I/O cosmetic fixes.
- Random coding style, whitespace and cosmetic fixes.
- Consistently use the same spacing and 4-hexdigit port number format
in the pnp_dev_info[] arrays.
- Drop dead/unused code and less useful comments.
- Add missing "(C)" characters and copyright years.
- Shorten and simplify some code snippets.
- Use u8/u16/etc. everywhere.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/winbond/w83627dhg')
| -rw-r--r-- | src/superio/winbond/w83627dhg/superio.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c index b94f4fee1b..bc19297ea6 100644 --- a/src/superio/winbond/w83627dhg/superio.c +++ b/src/superio/winbond/w83627dhg/superio.c @@ -94,18 +94,18 @@ static struct device_operations ops = { }; static struct pnp_info pnp_dev_info[] = { - { &ops, W83627DHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x0ff8, 0}, }, - { &ops, W83627DHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x0ff8, 0}, }, - { &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, }, - { &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, }, - { &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0xfff, 0 }, { 0xfff, 0x4}, }, + { &ops, W83627DHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, }, + { &ops, W83627DHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, }, + { &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, }, + { &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, }, + { &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x0fff, 0}, {0x0fff, 4}, }, /* the next line makes coreboot hang in pnp_enable_devices() */ /* { &ops, W83627DHG_SPI, PNP_IO1, { 0xff8, 0 }, }, */ { &ops, W83627DHG_GPIO6, }, { &ops, W83627DHG_WDTO_PLED, }, { &ops, W83627DHG_GPIO2345, }, { &ops, W83627DHG_ACPI, }, - { &ops, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, { 0xffe, 0 }, }, + { &ops, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, {0x0ffe, 0}, }, { &ops, W83627DHG_PECI_SST, }, }; |