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authorZheng Bao <zheng.bao@amd.com>2009-12-28 09:59:44 +0000
committerZheng Bao <Zheng.Bao@amd.com>2009-12-28 09:59:44 +0000
commit9db833bec394b886ca990965970cdb100b65d9ac (patch)
treeb06137607c918debaf7afb522feb3a56ee6f7ba5 /src/superio/winbond/w83627ehg/superio.c
parent0f0aa15e7eac54dae8d1710c3a4751c80b61709a (diff)
downloadcoreboot-9db833bec394b886ca990965970cdb100b65d9ac.tar.xz
trival. All the changes is about comment and spaces.
In superio folder. 1. Delete trailing white spaces. 2. Change the // comment to /* */. 3. Add some copyright header. 4. reindent. 5. delete multi blank lines. I tried my best to find them. If anything left, please fix it or tell me. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4993 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/winbond/w83627ehg/superio.c')
-rw-r--r--src/superio/winbond/w83627ehg/superio.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c
index e44a45ea85..daf4b7f261 100644
--- a/src/superio/winbond/w83627ehg/superio.c
+++ b/src/superio/winbond/w83627ehg/superio.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
+ * Copyright (C) 2004 Tyan
* Copyright (C) 2007 AMD
* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
*
@@ -57,7 +57,8 @@ static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg)
return inb(port_base + 1);
}
-static void enable_hwm_smbus(device_t dev) {
+static void enable_hwm_smbus(device_t dev)
+{
/* Set the pin 91,92 as I2C bus. */
uint8_t reg, value;
reg = 0x2a;
@@ -99,7 +100,7 @@ static void init_hwm(unsigned long base)
value = pnp_read_index(base, reg);
value &= 0xff & (~(hwm_reg_values[i + 1]));
value |= 0xff & hwm_reg_values[i + 2];
- // printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value);
+ /* printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value); */
pnp_write_index(base, reg, value);
}
}
@@ -182,7 +183,7 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, W83627EHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627EHG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627EHG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- // No 4 { 0,},
+ /* No 4 { 0,}, */
{ &ops, W83627EHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83627EHG_SFI, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627EHG_WDTO_PLED, },
@@ -208,4 +209,3 @@ struct chip_operations superio_winbond_w83627ehg_ops = {
CHIP_NAME("Winbond W83627EHG Super I/O")
.enable_dev = enable_dev,
};
-