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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-10 14:53:36 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-10 14:53:36 +0000
commit340fa9396b4b73fd894a15fe48882c98d74292ce (patch)
treefd38d38490431ddb2c210ffbc39b4771ce08eda2 /src/superio/winbond/w83627hf
parent02d66fd1bf3e5548dc5edaed074d2946fe5a37df (diff)
downloadcoreboot-340fa9396b4b73fd894a15fe48882c98d74292ce.tar.xz
Random Winbond Super I/O cosmetic and coding-style fixes.
- Whitespace, coding style, and typo fixes. - Drop unused/obsolete "#config chip.h". - Use u8/u16/etc. everywhere. - Use pnp_read_config()/pnp_write_config() instead of open-coding them. - Use pnp_set_logical_device() instead of open-coding it. - W83627EHG: Fix incorrect enable_hwm_smbus() code comment. - Use ARRAY_SIZE. - w83627hf/superio.c: w83627hf_16_bit_addr_qual(): Bugfix, the code was using 'dev->path.pnp.port >> 8' as config port, which is incorrect in superio.c (which has a "real" device_t struct, in contrast to *_early_serial.c which uses "unsigned" as device_t where 'dev >> 8' is required). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/winbond/w83627hf')
-rw-r--r--src/superio/winbond/w83627hf/Makefile.inc2
-rw-r--r--src/superio/winbond/w83627hf/chip.h2
-rw-r--r--src/superio/winbond/w83627hf/superio.c109
-rw-r--r--src/superio/winbond/w83627hf/w83627hf.h12
-rw-r--r--src/superio/winbond/w83627hf/w83627hf_early_init.c4
-rw-r--r--src/superio/winbond/w83627hf/w83627hf_early_serial.c19
6 files changed, 73 insertions, 75 deletions
diff --git a/src/superio/winbond/w83627hf/Makefile.inc b/src/superio/winbond/w83627hf/Makefile.inc
index 8b101e5d3b..3a23eeff13 100644
--- a/src/superio/winbond/w83627hf/Makefile.inc
+++ b/src/superio/winbond/w83627hf/Makefile.inc
@@ -20,5 +20,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-#config chip.h
ramstage-$(CONFIG_SUPERIO_WINBOND_W83627HF) += superio.c
+
diff --git a/src/superio/winbond/w83627hf/chip.h b/src/superio/winbond/w83627hf/chip.h
index 20f3d1782f..3b0d4aca69 100644
--- a/src/superio/winbond/w83627hf/chip.h
+++ b/src/superio/winbond/w83627hf/chip.h
@@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan By LYH change from PC87360
+ * Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c
index b6918470e0..3dbe8333fc 100644
--- a/src/superio/winbond/w83627hf/superio.c
+++ b/src/superio/winbond/w83627hf/superio.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan By LYH change from PC87360
+ * Copyright (C) 2004 Tyan
* Copyright (C) 2010 Win Enterprises (anishp@win-ent.com)
*
* This program is free software; you can redistribute it and/or modify
@@ -45,95 +45,95 @@ static void pnp_exit_ext_func_mode(device_t dev)
outb(0xaa, dev->path.pnp.port);
}
-static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
+static void pnp_write_index(u16 port, u8 reg, u8 value)
{
- outb(reg, port_base);
- outb(value, port_base + 1);
+ outb(reg, port);
+ outb(value, port + 1);
}
-static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg)
+static u8 pnp_read_index(u16 port, u8 reg)
{
- outb(reg, port_base);
- return inb(port_base + 1);
+ outb(reg, port);
+ return inb(port + 1);
}
#if CONFIG_EXPERT
static void w83627hf_16_bit_addr_qual(device_t dev)
{
- int port = dev->path.pnp.port >> 8;
- pnp_enter_ext_func_mode(dev);
- outb(0x24, port);
- /* enable 16 bit address qualification */
- outb(inb(port + 1) | 0x80, port + 1);
- pnp_exit_ext_func_mode(dev);
+ u8 reg8;
+
+ /* Enable 16 bit address qualification. */
+ pnp_enter_ext_func_mode(dev);
+ reg8 = pnp_read_config(dev, 0x24);
+ reg8 |= (1 << 7);
+ pnp_write_config(dev, 0x24, reg8);
+ pnp_exit_ext_func_mode(dev);
}
#endif
static void enable_hwm_smbus(device_t dev)
{
- /* set the pin 91,92 as I2C bus */
- uint8_t reg, value;
- reg = 0x2b;
- value = pnp_read_config(dev, reg);
- value &= 0x3f;
- pnp_write_config(dev, reg, value);
+ u8 reg8;
+
+ /* Configure pins 91/92 as SDA/SCL (I2C bus). */
+ reg8 = pnp_read_config(dev, 0x2b);
+ reg8 &= 0x3f;
+ pnp_write_config(dev, 0x2b, reg8);
}
static void init_acpi(device_t dev)
{
- uint8_t value = 0x20;
+ u8 value = 0x20; /* FIXME: The 0x20 value here is never used? */
int power_on = 1;
get_option(&power_on, "power_on_after_fail");
+
pnp_enter_ext_func_mode(dev);
- pnp_write_index(dev->path.pnp.port,7,0x0a);
+ pnp_set_logical_device(dev);
value = pnp_read_config(dev, 0xE4);
- value &= ~(3<<5);
- if(power_on) {
- value |= (1<<5);
- }
+ value &= ~(3 << 5);
+ if (power_on)
+ value |= (1 << 5);
pnp_write_config(dev, 0xE4, value);
pnp_exit_ext_func_mode(dev);
}
-static void init_hwm(unsigned long base)
+static void init_hwm(u16 base)
{
- uint8_t reg, value;
+ u8 reg, value;
int i;
- unsigned hwm_reg_values[] = {
- /* reg mask data */
- 0x40, 0xff, 0x81, /* start HWM */
- 0x48, 0xaa, 0x2a, /* set SMBus base to 0x54>>1 */
- 0x4a, 0x21, 0x21, /* set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1 */
+ u8 hwm_reg_values[] = {
+ /* reg mask data */
+ 0x40, 0xff, 0x81, /* Start HWM. */
+ 0x48, 0xaa, 0x2a, /* Set SMBus base to 0x2a (0x54 >> 1). */
+ 0x4a, 0x21, 0x21, /* Set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1. */
0x4e, 0x80, 0x00,
0x43, 0x00, 0xff,
0x44, 0x00, 0x3f,
0x4c, 0xbf, 0x18,
- 0x4d, 0xff, 0x80 /* turn off beep */
-
+ 0x4d, 0xff, 0x80, /* Turn off beep */
};
- for(i = 0; i< ARRAY_SIZE(hwm_reg_values); i+=3 ) {
+ for (i = 0; i < ARRAY_SIZE(hwm_reg_values); i += 3) {
reg = hwm_reg_values[i];
- value = pnp_read_index(base, reg);
- value &= 0xff & hwm_reg_values[i+1];
- value |= 0xff & hwm_reg_values[i+2];
-#if 0
- printk(BIOS_DEBUG, "base = 0x%04x, reg = 0x%02x, value = 0x%02x\n", base, reg,value);
-#endif
+ value = pnp_read_index(base, reg);
+ value &= 0xff & hwm_reg_values[i + 1];
+ value |= 0xff & hwm_reg_values[i + 2];
+ printk(BIOS_DEBUG, "base = 0x%04x, reg = 0x%02x, "
+ "value = 0x%02x\n", base, reg, value);
pnp_write_index(base, reg, value);
}
}
static void w83627hf_init(device_t dev)
{
- struct superio_winbond_w83627hf_config *conf;
+ struct superio_winbond_w83627hf_config *conf = dev->chip_info;
struct resource *res0, *res1;
- if (!dev->enabled) {
+
+ if (!dev->enabled)
return;
- }
- conf = dev->chip_info;
+
switch(dev->path.pnp.device) {
case W83627HF_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
@@ -172,7 +172,7 @@ static void w83627hf_pnp_enable_resources(device_t dev)
pnp_enable_resources(dev);
switch(dev->path.pnp.device) {
case W83627HF_HWM:
- printk(BIOS_DEBUG, "w83627hf hwm smbus enabled\n");
+ printk(BIOS_DEBUG, "W83627HF HWM SMBus enabled\n");
enable_hwm_smbus(dev);
break;
}
@@ -181,14 +181,13 @@ static void w83627hf_pnp_enable_resources(device_t dev)
static void w83627hf_pnp_enable(device_t dev)
{
- if (!dev->enabled) {
- pnp_enter_ext_func_mode(dev);
-
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
+ if (dev->enabled)
+ return;
- pnp_exit_ext_func_mode(dev);
- }
+ pnp_enter_ext_func_mode(dev);
+ pnp_set_logical_device(dev);
+ pnp_set_enable(dev, 0);
+ pnp_exit_ext_func_mode(dev);
}
static struct device_operations ops = {
@@ -204,7 +203,6 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, W83627HF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627HF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627HF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- /* No 4 { 0,}, */
{ &ops, W83627HF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, },
@@ -216,8 +214,7 @@ static struct pnp_info pnp_dev_info[] = {
static void enable_dev(struct device *dev)
{
- pnp_enable_devices(dev, &ops,
- ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+ pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_winbond_w83627hf_ops = {
diff --git a/src/superio/winbond/w83627hf/w83627hf.h b/src/superio/winbond/w83627hf/w83627hf.h
index cb186a90f6..f0566fc30f 100644
--- a/src/superio/winbond/w83627hf/w83627hf.h
+++ b/src/superio/winbond/w83627hf/w83627hf.h
@@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan By LYH change from PC87360
+ * Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -24,16 +24,16 @@
#define SUPERIO_WINBOND_W83627HF_W83627HF_H
#define W83627HF_FDC 0 /* Floppy */
-#define W83627HF_PP 1 /* Parallel Port */
+#define W83627HF_PP 1 /* Parallel port */
#define W83627HF_SP1 2 /* Com1 */
#define W83627HF_SP2 3 /* Com2 */
-#define W83627HF_KBC 5 /* Keyboard & Mouse */
+#define W83627HF_KBC 5 /* PS/2 keyboard & mouse */
#define W83627HF_CIR 6
#define W83627HF_GAME_MIDI_GPIO1 7
#define W83627HF_GPIO2 8
#define W83627HF_GPIO3 9
#define W83627HF_ACPI 10
-#define W83627HF_HWM 11 /* Hardware Monitor */
+#define W83627HF_HWM 11 /* Hardware monitor */
/* #define W83627HF_GPIO_DEV PNP_DEV(0x2e, W83627HF_GPIO) */
/* #define W83627HF_XBUS_DEV PNP_DEV(0x2e, W83627HF_XBUS) */
@@ -115,8 +115,8 @@
#if defined(__PRE_RAM__) && !defined(__ROMCC__)
void w83627hf_disable_dev(device_t dev);
-void w83627hf_enable_dev(device_t dev, unsigned iobase);
-void w83627hf_enable_serial(device_t dev, unsigned iobase);
+void w83627hf_enable_dev(device_t dev, u16 iobase);
+void w83627hf_enable_serial(device_t dev, u16 iobase);
void w83627hf_set_clksel_48(device_t dev);
#endif
diff --git a/src/superio/winbond/w83627hf/w83627hf_early_init.c b/src/superio/winbond/w83627hf/w83627hf_early_init.c
index a74e10a414..55ab2fa109 100644
--- a/src/superio/winbond/w83627hf/w83627hf_early_init.c
+++ b/src/superio/winbond/w83627hf/w83627hf_early_init.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright 2003-2004 Linux Networx
- * Copyright 2004 Tyan By LYH change from PC87360
+ * Copyright 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -29,7 +29,7 @@ void w83627hf_disable_dev(device_t dev)
pnp_set_enable(dev, 0);
}
-void w83627hf_enable_dev(device_t dev, unsigned iobase)
+void w83627hf_enable_dev(device_t dev, u16 iobase)
{
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
diff --git a/src/superio/winbond/w83627hf/w83627hf_early_serial.c b/src/superio/winbond/w83627hf/w83627hf_early_serial.c
index 2bc6c1dddf..14cad5dd66 100644
--- a/src/superio/winbond/w83627hf/w83627hf_early_serial.c
+++ b/src/superio/winbond/w83627hf/w83627hf_early_serial.c
@@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan By LYH change from PC87360
+ * Copyright (C) 2004 Tyan
* Copyright (C) 2010 Win Enterprises (anishp@win-ent.com)
*
* This program is free software; you can redistribute it and/or modify
@@ -24,20 +24,20 @@
#include <arch/romcc_io.h>
#include "w83627hf.h"
-static inline void pnp_enter_ext_func_mode(device_t dev)
+static void pnp_enter_ext_func_mode(device_t dev)
{
- unsigned port = dev>>8;
+ u16 port = dev >> 8;
outb(0x87, port);
outb(0x87, port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
- unsigned port = dev>>8;
+ u16 port = dev >> 8;
outb(0xaa, port);
}
-void w83627hf_enable_serial(device_t dev, unsigned iobase)
+void w83627hf_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);
@@ -49,10 +49,11 @@ void w83627hf_enable_serial(device_t dev, unsigned iobase)
void w83627hf_set_clksel_48(device_t dev)
{
- unsigned port = dev >> 8;
+ u8 reg8;
+
pnp_enter_ext_func_mode(dev);
- outb(0x24, port);
- /* Set CLKSEL (clock input on pin 1) to 48MHz. */
- outb(inb(port + 1) | (1 << 6), port + 1);
+ reg8 = pnp_read_config(dev, 0x24);
+ reg8 |= (1 << 6); /* Set CLKSEL (clock input on pin 1) to 48MHz. */
+ pnp_write_config(dev, 0x24, reg8);
pnp_exit_ext_func_mode(dev);
}