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authorNico Huber <nico.huber@secunet.com>2013-07-01 16:29:16 +0200
committerRonald G. Minnich <rminnich@gmail.com>2013-07-03 17:58:20 +0200
commitdd94fa93b403a73cc7d7b282eb6cefeb27512d13 (patch)
tree04177e49f21a1bfb9c2278ccd8fb2374371c0d90 /src/superio/winbond
parent1c81128dcd3a723f75d554b0a8d87101d7dd3663 (diff)
downloadcoreboot-dd94fa93b403a73cc7d7b282eb6cefeb27512d13.tar.xz
winbond/w83627dhg: Fix logical device power down in ACPI
The W83627DHG has some power managements bits to power down individual logical devices. These are called `* Power Down`. Counterintuitively and in contrast to `Immediate Power Down` (bit to power down the whole chip), these bits are set when the respective logical device is powered. Unfortunately, our ACPI code set them wrong which led to disabled devices after a S3 suspend/resume. Adding an option how to set the PM bits and setting them to zero for the W83627DHG, corrects it. Tested with kontron/ktqm77. Change-Id: I8a472d480d4277721bd17c9f7c2ce44fa84e8ae2 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3590 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/superio/winbond')
-rw-r--r--src/superio/winbond/w83627dhg/acpi/superio.asl6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/superio/winbond/w83627dhg/acpi/superio.asl b/src/superio/winbond/w83627dhg/acpi/superio.asl
index 417d6fe41c..7616363f11 100644
--- a/src/superio/winbond/w83627dhg/acpi/superio.asl
+++ b/src/superio/winbond/w83627dhg/acpi/superio.asl
@@ -147,9 +147,11 @@ Device(SUPERIO_DEV) {
#undef SUPERIO_UART_LDN
#undef SUPERIO_UART_DDN
#undef SUPERIO_UART_PM_REG
+ #undef SUPERIO_UART_PM_VAL
#undef SUPERIO_UART_PM_LDN
#define SUPERIO_UART_LDN 2
#define SUPERIO_UART_PM_REG UAPW
+ #define SUPERIO_UART_PM_VAL 0
#define SUPERIO_UART_PM_LDN PNP_NO_LDN_CHANGE
#include <superio/acpi/pnp_uart.asl>
#endif
@@ -158,9 +160,11 @@ Device(SUPERIO_DEV) {
#undef SUPERIO_UART_LDN
#undef SUPERIO_UART_DDN
#undef SUPERIO_UART_PM_REG
+ #undef SUPERIO_UART_PM_VAL
#undef SUPERIO_UART_PM_LDN
#define SUPERIO_UART_LDN 3
#define SUPERIO_UART_PM_REG UBPW
+ #define SUPERIO_UART_PM_VAL 0
#define SUPERIO_UART_PM_LDN PNP_NO_LDN_CHANGE
#include <superio/acpi/pnp_uart.asl>
#endif
@@ -180,6 +184,7 @@ Device(SUPERIO_DEV) {
#undef SUPERIO_PNP_LDN
#undef SUPERIO_PNP_DDN
#undef SUPERIO_PNP_PM_REG
+ #undef SUPERIO_PNP_PM_VAL
#undef SUPERIO_PNP_PM_LDN
#undef SUPERIO_PNP_IO0
#undef SUPERIO_PNP_IO1
@@ -188,6 +193,7 @@ Device(SUPERIO_DEV) {
#undef SUPERIO_PNP_DMA
#define SUPERIO_PNP_LDN 11
#define SUPERIO_PNP_PM_REG HWPW
+ #define SUPERIO_PNP_PM_VAL 0
#define SUPERIO_PNP_PM_LDN PNP_NO_LDN_CHANGE
#define SUPERIO_PNP_IO0 0x08, 0x08
#define SUPERIO_PNP_IRQ0 1