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| author | Greg Watson <jarrah@users.sourceforge.net> | 2003-07-20 23:28:01 +0000 |
|---|---|---|
| committer | Greg Watson <jarrah@users.sourceforge.net> | 2003-07-20 23:28:01 +0000 |
| commit | d0580343b6c81697f0050b38ea36ee154d242ac2 (patch) | |
| tree | b2c838e68ddf833ddc0b4294a4c98f81daf817e1 /src/superio | |
| parent | 9b4336cf418d22551bea09d93e1cee79281b110e (diff) | |
| download | coreboot-d0580343b6c81697f0050b38ea36ee154d242ac2.tar.xz | |
chip stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@988 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio')
| -rw-r--r-- | src/superio/NSC/pc97307/chip.h | 5 | ||||
| -rw-r--r-- | src/superio/NSC/pc97307/superio.c | 31 |
2 files changed, 22 insertions, 14 deletions
diff --git a/src/superio/NSC/pc97307/chip.h b/src/superio/NSC/pc97307/chip.h new file mode 100644 index 0000000000..d30b7cb26c --- /dev/null +++ b/src/superio/NSC/pc97307/chip.h @@ -0,0 +1,5 @@ + +struct superio_NSC_pc97307_config { + typedef struct com_ports com1; + typedef struct lpt_ports lpt; +}; diff --git a/src/superio/NSC/pc97307/superio.c b/src/superio/NSC/pc97307/superio.c index 8dc2ca8661..00117d8f32 100644 --- a/src/superio/NSC/pc97307/superio.c +++ b/src/superio/NSC/pc97307/superio.c @@ -2,6 +2,7 @@ /* This code is distributed without warranty under the GPL v2 (see COPYING) */ #include <arch/io.h> +#include <device/chip.h> #ifndef PNP_INDEX_REG #define PNP_INDEX_REG 0x15C @@ -18,26 +19,28 @@ void pnp_output(char address, char data) { - outb(address, PNP_INDEX_REG); - outb(data, PNP_DATA_REG); + outb(address, PNP_INDEX_REG); + outb(data, PNP_DATA_REG); } -void sio_enable(void) +void sio_enable(struct chip *chip, enum chip_pass pass) { - /* Enable Super IO Chip */ - pnp_output(0x07, 6); /* LD 6 = UART1 */ - pnp_output(0x30, 0); /* Dectivate */ - pnp_output(0x60, SIO_COM1_BASE >> 8); /* IO Base */ - pnp_output(0x61, SIO_COM1_BASE & 0xFF); /* IO Base */ - pnp_output(0x30, 1); /* Activate */ + switch (pass) { + case CHIP_PRE_CONSOLE: + /* Enable Super IO Chip */ + pnp_output(0x07, 6); /* LD 6 = UART1 */ + pnp_output(0x30, 0); /* Dectivate */ + pnp_output(0x60, chip->control->defaultport >> 8); /* IO Base */ + pnp_output(0x61, chip->control->defaultport & 0xFF); /* IO Base */ + pnp_output(0x30, 1); /* Activate */ + break; + default: + /* nothing yet */ + } } -#if 0 struct superio_control superio_NSC_pc97307_control = { - pre_pci_init: (void *)0, - init: (void *)0, - finishup: (void *)0, + enable: sio_enable, defaultport: SIO_COM1_BASE, name: "NSC 87307" }; -#endif |