diff options
| author | Christopher Kilgour <techie@whiterocker.com> | 2008-04-19 13:32:19 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2008-04-19 13:32:19 +0000 |
| commit | 7bc63fd2cbe5b512b982ee0a0c5a1552f4f3e249 (patch) | |
| tree | 3d647a802ea18275ac58fc18f5ee340343e38eeb /src/superio | |
| parent | 59711210093b028a69e3292a2558a5c40339c5d2 (diff) | |
| download | coreboot-7bc63fd2cbe5b512b982ee0a0c5a1552f4f3e249.tar.xz | |
This trivial patch adds the SMSC SCH3112 Super I/O chip ID to the
generic SMSC support, and corrects a small typo.
With this patch, coreboot v2 on a mainboard with SCH3112 has been
demonstrated to correctly use the serial port. No other chip
functions were tested.
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio')
| -rw-r--r-- | src/superio/smsc/smscsuperio/smscsuperio_early_serial.c | 2 | ||||
| -rw-r--r-- | src/superio/smsc/smscsuperio/superio.c | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c b/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c index 4cb4e18529..28022b649e 100644 --- a/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c +++ b/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c @@ -30,7 +30,7 @@ * Enable the specified serial port. * * @param dev The device to use. - * @param dev The I/O base of the serial port (usually 0x3f8/0x2f8). + * @param iobase The I/O base of the serial port (usually 0x3f8/0x2f8). */ static inline void smscsuperio_enable_serial(device_t dev, uint16_t iobase) { diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c index 49a105d5a1..dae720eb6b 100644 --- a/src/superio/smsc/smscsuperio/superio.c +++ b/src/superio/smsc/smscsuperio/superio.c @@ -56,6 +56,7 @@ #define LPC47B397 0x6f #define A8000 0x77 /* ASUS A8000, a rebranded DME1737(?) */ #define DME1737 0x78 +#define SCH3112 0x7c #define SCH5307 0x81 /* Rebranded LPC47B397(?) */ /* Register defines */ @@ -127,6 +128,7 @@ static const struct logical_devices { {LPC47B397,{0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10, -1, -1}}, {A8000, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}}, {DME1737, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}}, + {SCH3112, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}}, {SCH5307, {0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10, -1, -1}}, }; |