- Add support _framework_ for the Asus p2b.

- New superIO winbond/w83977tf
- Add single memory controller SBbus debug routine
into a file private to the i440bx

This adds support the start of support for an Asus p2b
mainboard.  Current limitations are the same as for the 
Bitworks IMS board.  Reads from the SMbus don't work.

Moving dump_spd_registers() into its own private copy
solves the problem of having to go hack on the version that
included in src/sdram to only do one memory controller.




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2351 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 154 insertions, 0 deletions

diff --git a/src/superio/winbond/w83977tf/Config.lb b/src/superio/winbond/w83977tf/Config.lb
new file mode 100644
index 0000000000..f62a567d61
--- /dev/null
+++ b/src/superio/winbond/w83977tf/Config.lb
@@ -0,0 +1,2 @@
+config chip.h
+object superio.o
diff --git a/src/superio/winbond/w83977tf/chip.h b/src/superio/winbond/w83977tf/chip.h
new file mode 100644
index 0000000000..e3bf5bec6d
--- /dev/null
+++ b/src/superio/winbond/w83977tf/chip.h
@@ -0,0 +1,16 @@
+#ifndef SIO_COM1
+#define SIO_COM1_BASE   0x3F8
+#endif
+#ifndef SIO_COM2
+#define SIO_COM2_BASE   0x2F8
+#endif
+
+extern struct chip_operations superio_winbond_w83977tf_ops;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_winbond_w83977tf_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};
diff --git a/src/superio/winbond/w83977tf/superio.c b/src/superio/winbond/w83977tf/superio.c
new file mode 100644
index 0000000000..d9b6f65894
--- /dev/null
+++ b/src/superio/winbond/w83977tf/superio.c
@@ -0,0 +1,114 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* Copyright 2003-2004 Linux Networx */
+/* Copyright 2004 Tyan 
+   By LYH change from PC87360 */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+/* 2006-4-24 
+ * Adapted for the w83977 by rsmith <smithbone@gmail.com> 
+ * This is mostly just a search and replace on the part type
+ * TODO: Actually see if all the sub functionis exist and are
+ *       setup correctly.
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <string.h>
+#include <bitops.h>
+#include <uart8250.h>
+#include <pc80/keyboard.h>
+#include "chip.h"
+#include "w83977tf.h"
+
+static void w83977tf_enter_ext_func_mode(device_t dev) 
+{
+        outb(0x87, dev->path.u.pnp.port);
+        outb(0x87, dev->path.u.pnp.port);
+}
+static void w83977tf_exit_ext_func_mode(device_t dev) 
+{
+        outb(0xaa, dev->path.u.pnp.port);
+}
+
+static void w83977tf_init(device_t dev)
+{
+	struct superio_winbond_w83977tf_config *conf;
+	struct resource *res0, *res1;
+	/* Wishlist handle well known programming interfaces more
+	 * generically.
+	 */
+	if (!dev->enabled) {
+		return;
+	}
+	conf = dev->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case W83977TF_SP1: 
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+	case W83977TF_SP2:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+	case W83977TF_KBC:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		res1 = find_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+	}
+}
+
+static void w83977tf_set_resources(device_t dev)
+{
+	w83977tf_enter_ext_func_mode(dev);
+	pnp_set_resources(dev);
+	w83977tf_exit_ext_func_mode(dev);
+}
+
+static void w83977tf_enable_resources(device_t dev)
+{
+	w83977tf_enter_ext_func_mode(dev);
+	pnp_enable_resources(dev);
+	w83977tf_exit_ext_func_mode(dev);
+}
+
+static void w83977tf_enable(device_t dev)
+{
+	w83977tf_enter_ext_func_mode(dev);   
+	pnp_enable(dev);
+	w83977tf_exit_ext_func_mode(dev);  
+}
+
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = w83977tf_set_resources,
+	.enable_resources = w83977tf_enable_resources,
+	.enable           = w83977tf_enable,
+	.init             = w83977tf_init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+        { &ops, W83977TF_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+        { &ops, W83977TF_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
+        { &ops, W83977TF_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+        { &ops, W83977TF_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+        // No 4 { 0,},
+        { &ops, W83977TF_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
+        { &ops, W83977TF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+        { &ops, W83977TF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
+        { &ops, W83977TF_ACPI, PNP_IRQ0,  },
+};
+
+static void enable_dev(device_t dev)
+{
+	pnp_enable_devices(dev, &ops,
+		sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+}
+
+struct chip_operations superio_winbond_w83977tf_ops = {
+	CHIP_NAME("Winbond w83977tf")
+	.enable_dev = enable_dev,
+};
diff --git a/src/superio/winbond/w83977tf/w83977tf.h b/src/superio/winbond/w83977tf/w83977tf.h
new file mode 100644
index 0000000000..76eec89ee1
--- /dev/null
+++ b/src/superio/winbond/w83977tf/w83977tf.h
@@ -0,0 +1,11 @@
+#define W83977TF_FDC              0   /* Floppy */
+#define W83977TF_PP               1   /* Parallel Port */
+#define W83977TF_SP1              2   /* Com1 */
+#define W83977TF_SP2              3   /* Com2 */
+#define W83977TF_KBC              5   /* Keyboard & Mouse */
+#define W83977TF_CIR              6
+#define W83977TF_GAME_MIDI_GPIO1  7
+#define W83977TF_GPIO2            8
+#define W83977TF_GPIO3            9
+#define W83977TF_ACPI            10
+
diff --git a/src/superio/winbond/w83977tf/w83977tf_early_serial.c b/src/superio/winbond/w83977tf/w83977tf_early_serial.c
new file mode 100644
index 0000000000..fffc16d430
--- /dev/null
+++ b/src/superio/winbond/w83977tf/w83977tf_early_serial.c
@@ -0,0 +1,11 @@
+#include <arch/romcc_io.h>
+#include "w83977tf.h"
+
+
+static void w83977tf_enable_serial(device_t dev, unsigned iobase)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}