diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-09 14:46:51 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-09 14:46:51 +0000 |
commit | d4f53738e678f99bd12068b2e2b2ecae9fc046b0 (patch) | |
tree | 0f15a41041822a88cef4fb74fa747b0021ac8960 /src/superio | |
parent | f358c0c55510e4272ace99e192b9494e64f89697 (diff) | |
download | coreboot-d4f53738e678f99bd12068b2e2b2ecae9fc046b0.tar.xz |
zero warnings days.
The tyan s2895 is down to 3 warnings, 2 of which are caused by #warning.
The 1000 ways of how the AMD code waits for the cores to be started up
are a real pain for the brain.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio')
-rw-r--r-- | src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c b/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c index 8b09e09a10..8eff2325ba 100644 --- a/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c +++ b/src/superio/smsc/lpc47b397/lpc47b397_early_gpio.c @@ -30,6 +30,7 @@ static unsigned lpc47b397_gpio_offset_in(unsigned iobase, unsigned offset) return inb(iobase+offset); } +#if 0 /* for GP60-GP64, GP66-GP85 */ #define LPC47B397_GPIO_CNTL_INDEX 0x70 #define LPC47B397_GPIO_CNTL_DATA 0x71 @@ -45,3 +46,4 @@ static unsigned lpc47b397_gpio_index_in(unsigned iobase, unsigned index) outb(index,iobase+LPC47B397_GPIO_CNTL_INDEX); return inb(iobase+LPC47B397_GPIO_CNTL_DATA); } +#endif |