diff options
author | Eric Biederman <ebiederm@xmission.com> | 2004-11-18 22:38:08 +0000 |
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committer | Eric Biederman <ebiederm@xmission.com> | 2004-11-18 22:38:08 +0000 |
commit | a9e632c2ac29c60872e7e4f9314263b34ce5031d (patch) | |
tree | 2a76647833896d68306553c548a65743c87b417e /src/superio | |
parent | bec8acedf18b4d35f95b4a4c254eb925bd4d53bd (diff) | |
download | coreboot-a9e632c2ac29c60872e7e4f9314263b34ce5031d.tar.xz |
- First stab at getting the ppc ports building and working.
- The sandpointx3+altimus has been consolidated into one directory for now.
- Added support for having different versions of the pci access functions
on a per bus basis if needed.
Hopefully I have not broken something inadvertently.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio')
-rw-r--r-- | src/superio/NSC/pc97307/superio.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/src/superio/NSC/pc97307/superio.c b/src/superio/NSC/pc97307/superio.c index ebe5d36ee2..711b98639f 100644 --- a/src/superio/NSC/pc97307/superio.c +++ b/src/superio/NSC/pc97307/superio.c @@ -3,6 +3,8 @@ #include <arch/io.h> #include <console/console.h> +#include <device/device.h> +#include <device/pnp.h> #include "chip.h" #include "pc97307.h" @@ -14,7 +16,7 @@ static void init(device_t dev) if (!dev->enabled) { return; } - conf = dev->chip; + conf = dev->chip_info; switch(dev->path.u.pnp.device) { case PC97307_SP1: res0 = find_resource(dev, PNP_IDX_IO0); @@ -39,6 +41,8 @@ static void init(device_t dev) break; case PC97307_FDC: + { + unsigned reg; /* Set up floppy in PS/2 mode */ outb(0x09, SIO_CONFIG_RA); reg = inb(SIO_CONFIG_RD); @@ -46,7 +50,9 @@ static void init(device_t dev) outb(reg, SIO_CONFIG_RD); outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */ break; - + } + default: + break; } } @@ -76,7 +82,7 @@ static void enable_dev(struct device *dev) sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); } -struct chip_operations superio_NSC_pc97307_control = { +struct chip_operations superio_NSC_pc97307_ops = { CHIP_NAME("NSC 97307") .enable_dev = enable_dev, }; |