Add F71859 SIO.

Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5802 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

7 files changed, 224 insertions, 0 deletions

diff --git a/src/superio/fintek/Kconfig b/src/superio/fintek/Kconfig
index e70ac8f38e..7ea112945b 100644
--- a/src/superio/fintek/Kconfig
+++ b/src/superio/fintek/Kconfig
@@ -2,3 +2,5 @@ config SUPERIO_FINTEK_F71805F
 	bool
 config SUPERIO_FINTEK_F71863FG
 	bool
+config SUPERIO_FINTEK_F71859
+	bool
diff --git a/src/superio/fintek/Makefile.inc b/src/superio/fintek/Makefile.inc
index a5d7d798e9..5d09709595 100644
--- a/src/superio/fintek/Makefile.inc
+++ b/src/superio/fintek/Makefile.inc
@@ -1,2 +1,3 @@
 subdirs-y += f71805f
 subdirs-y += f71863fg
+subdirs-y += f71859
diff --git a/src/superio/fintek/f71859/Makefile.inc b/src/superio/fintek/f71859/Makefile.inc
new file mode 100755
index 0000000000..9849cbe14f
--- /dev/null
+++ b/src/superio/fintek/f71859/Makefile.inc
@@ -0,0 +1,20 @@
+##
+## This file is part of the coreboot project.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+#config chip.h
+obj-$(CONFIG_SUPERIO_FINTEK_F71859) += superio.o
diff --git a/src/superio/fintek/f71859/chip.h b/src/superio/fintek/f71859/chip.h
new file mode 100755
index 0000000000..d823c45053
--- /dev/null
+++ b/src/superio/fintek/f71859/chip.h
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Marc Jones <marcj303@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include <device/device.h>
+#include <uart8250.h>
+
+extern struct chip_operations superio_fintek_f71859_ops;
+
+struct superio_fintek_f71859_config {
+	struct uart8250 com1, com2;
+};
diff --git a/src/superio/fintek/f71859/f71859.h b/src/superio/fintek/f71859/f71859.h
new file mode 100755
index 0000000000..74c108e878
--- /dev/null
+++ b/src/superio/fintek/f71859/f71859.h
@@ -0,0 +1,24 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Marc Jones <marcj303@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/* Logical Device Numbers (LDN). */
+
+#define F71859_SP1	0x03	/* UART1 */
+
diff --git a/src/superio/fintek/f71859/f71859_early_serial.c b/src/superio/fintek/f71859/f71859_early_serial.c
new file mode 100755
index 0000000000..07d62088df
--- /dev/null
+++ b/src/superio/fintek/f71859/f71859_early_serial.c
@@ -0,0 +1,46 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Marc Jones <marcj303@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/* Pre-RAM driver for the Fintek F71859 Super I/O chip. */
+
+#include <arch/romcc_io.h>
+#include "f71859.h"
+
+static inline void pnp_enter_conf_state(device_t dev)
+{
+	unsigned int port = dev >> 8;
+	outb(0x87, port);
+}
+
+static void pnp_exit_conf_state(device_t dev)
+{
+	unsigned int port = dev >> 8;
+	outb(0xaa, port);
+}
+
+static void f71859_enable_serial(device_t dev, unsigned int iobase)
+{
+	pnp_enter_conf_state(dev);
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+	pnp_exit_conf_state(dev);
+}
diff --git a/src/superio/fintek/f71859/superio.c b/src/superio/fintek/f71859/superio.c
new file mode 100755
index 0000000000..caf6f12e4d
--- /dev/null
+++ b/src/superio/fintek/f71859/superio.c
@@ -0,0 +1,103 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Marc Jones <marcj303@gmail.com>
+ * Copyright (C) 2008 Corey Osgood <corey.osgood@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <console/console.h>
+#include <stdlib.h>
+#include <uart8250.h>
+#include "chip.h"
+#include "f71859.h"
+
+static void pnp_enter_conf_state(device_t dev)
+{
+	outb(0x87, dev->path.pnp.port);
+}
+
+static void pnp_exit_conf_state(device_t dev)
+{
+	outb(0xaa, dev->path.pnp.port);
+}
+
+static void f71859_init(device_t dev)
+{
+	struct superio_fintek_f71859_config *conf = dev->chip_info;
+	struct resource *res0;
+
+	if (!dev->enabled)
+		return;
+
+	switch(dev->path.pnp.device) {
+	/* TODO: Might potentially need code for HWM or FDC etc. */
+	case F71859_SP1:
+		res0 = find_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+	}
+}
+
+static void f71859_pnp_set_resources(device_t dev)
+{
+	pnp_enter_conf_state(dev);
+	pnp_set_resources(dev);
+	pnp_exit_conf_state(dev);
+}
+
+static void f71859_pnp_enable_resources(device_t dev)
+{
+	pnp_enter_conf_state(dev);
+	pnp_enable_resources(dev);
+	pnp_exit_conf_state(dev);
+}
+
+static void f71859_pnp_enable(device_t dev)
+{
+	pnp_enter_conf_state(dev);
+	pnp_set_logical_device(dev);
+	(dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0);
+	pnp_exit_conf_state(dev);
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = f71859_pnp_set_resources,
+	.enable_resources = f71859_pnp_enable_resources,
+	.enable           = f71859_pnp_enable,
+	.init             = f71859_init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+	/* TODO: Some of the 0x7f8 etc. values may not be correct. */
+	{ &ops, F71859_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+
+};
+
+static void enable_dev(device_t dev)
+{
+	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_fintek_f71859_ops = {
+	CHIP_NAME("Fintek F71859 Super I/O")
+	.enable_dev = enable_dev
+};