superio/nuvoton: factor out generic romstage components

The romstage of Nuvoton Super I/O chips (but not Nuvoton BMC chips)
is identical, so the early_serial.c file can be moved under
nuvoton/common.
The Nuvoton BMC chip WPCM450 is however left untouched.

Change-Id: I4663176c1003b24a49a9fe5f9ebd27a1963b5565
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/5909
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>

6 files changed, 94 insertions, 28 deletions

diff --git a/src/superio/nuvoton/Kconfig b/src/superio/nuvoton/Kconfig
index 142738d046..350c8dd387 100644
--- a/src/superio/nuvoton/Kconfig
+++ b/src/superio/nuvoton/Kconfig
@@ -17,7 +17,14 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
+# Generic Nuvoton romstage driver - Just enough UART initialisation code for
+# romstage.
+config SUPERIO_NUVOTON_COMMON_ROMSTAGE
+	bool
+
 config SUPERIO_NUVOTON_WPCM450
 	bool
+
 config SUPERIO_NUVOTON_NCT5104D
 	bool
+	select SUPERIO_NUVOTON_COMMON_ROMSTAGE
diff --git a/src/superio/nuvoton/Makefile.inc b/src/superio/nuvoton/Makefile.inc
index 18025c9c2d..1ce6963b79 100644
--- a/src/superio/nuvoton/Makefile.inc
+++ b/src/superio/nuvoton/Makefile.inc
@@ -17,5 +17,8 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
+## include generic nuvoton pre-ram stage driver
+romstage-$(CONFIG_SUPERIO_NUVOTON_COMMON_ROMSTAGE) += common/early_serial.c
+
 subdirs-$(CONFIG_SUPERIO_NUVOTON_WPCM450) += wpcm450
 subdirs-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += nct5104d
diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c
new file mode 100644
index 0000000000..1cbcee8361
--- /dev/null
+++ b/src/superio/nuvoton/common/early_serial.c
@@ -0,0 +1,75 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ * Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*
+ * A generic romstage (pre-ram) driver for Nuvoton variant Super I/O chips.
+ *
+ * The following is derived directly from the vendor Nuvoton's data-sheets:
+ *
+ * To toggle between `configuration mode` and `normal operation mode` as to
+ * manipulate the various LDN's in Nuvoton Super I/O's we are required to
+ * pass magic numbers `passwords keys`.
+ *
+ *  NUVOTON_ENTRY_KEY :=  enable  configuration : 0x87
+ *  NUVOTON_EXIT_KEY  :=  disable configuration : 0xAA
+ *
+ * To modify a LDN's configuration register, we use the index port to select
+ * the index of the LDN and then write to the data port to alter the
+ * parameters. A default index, data port pair is 0x4E, 0x4F respectively, a
+ * user modified pair is 0x2E, 0x2F respectively.
+ *
+ */
+
+#include <arch/io.h>
+#include <device/pnp.h>
+#include <stdint.h>
+#include "nuvoton.h"
+
+#define NUVOTON_ENTRY_KEY 0x87
+#define NUVOTON_EXIT_KEY 0xAA
+
+/* Enable configuration: pass entry key '0x87' into index port dev
+ * two times. */
+static void pnp_enter_conf_state(device_t dev)
+{
+	u16 port = dev >> 8;
+	outb(NUVOTON_ENTRY_KEY, port);
+	outb(NUVOTON_ENTRY_KEY, port);
+}
+
+/* Disable configuration: pass exit key '0xAA' into index port dev. */
+static void pnp_exit_conf_state(device_t dev)
+{
+	u16 port = dev >> 8;
+	outb(NUVOTON_EXIT_KEY, port);
+}
+
+/* Bring up early serial debugging output before the RAM is initialized. */
+void nuvoton_enable_serial(device_t dev, u16 iobase)
+{
+	pnp_enter_conf_state(dev);
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+	pnp_exit_conf_state(dev);
+}
diff --git a/src/superio/nuvoton/nct5104d/early_init.c b/src/superio/nuvoton/common/nuvoton.h
index f3d8990fed..e9e8d4b2c9 100644
--- a/src/superio/nuvoton/nct5104d/early_init.c
+++ b/src/superio/nuvoton/common/nuvoton.h
@@ -1,7 +1,8 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ * Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -15,32 +16,15 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <arch/io.h>
-#include <device/pnp.h>
-#include "nct5104d.h"
+#ifndef SUPERIO_NUVOTON_COMMON_ROMSTAGE_H
+#define SUPERIO_NUVOTON_COMMON_ROMSTAGE_H
 
-static void pnp_enter_extended_mode(device_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0x87,port);
-	outb(0x87,port);
-}
+#include <arch/io.h>
+#include <stdint.h>
 
-static void pnp_exit_extended_mode(device_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0xaa,port);
-}
+void nuvoton_enable_serial(device_t dev, u16 iobase);
 
-void nct5104d_enable_serial(device_t dev, u16 iobase)
-{
-	pnp_enter_extended_mode(dev);
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev,0);
-	pnp_set_iobase(dev,PNP_IDX_IO0, iobase);
-	pnp_set_enable(dev,1);
-	pnp_exit_extended_mode(dev);
-}
+#endif /* SUPERIO_NUVOTON_COMMON_ROMSTAGE_H */
diff --git a/src/superio/nuvoton/nct5104d/Makefile.inc b/src/superio/nuvoton/nct5104d/Makefile.inc
index 7c97d059d5..fcb5ec22c3 100644
--- a/src/superio/nuvoton/nct5104d/Makefile.inc
+++ b/src/superio/nuvoton/nct5104d/Makefile.inc
@@ -18,5 +18,4 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
-romstage-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += early_init.c
 ramstage-$(CONFIG_SUPERIO_NUVOTON_NCT5104D) += superio.c
diff --git a/src/superio/nuvoton/nct5104d/nct5104d.h b/src/superio/nuvoton/nct5104d/nct5104d.h
index 98baf810e5..5c30e02027 100644
--- a/src/superio/nuvoton/nct5104d/nct5104d.h
+++ b/src/superio/nuvoton/nct5104d/nct5104d.h
@@ -37,6 +37,4 @@
 #define NCT5104D_GPIO1 ((1 << 8) | NCT5104D_GPIO_V)
 #define NCT5104D_GPIO6 ((6 << 8) | NCT5104D_GPIO_V)
 
-void nct5104d_enable_serial(device_t dev, u16 iobase);
-
 #endif /* SUPERIO_NUVOTON_NCT5104D_NCT5104D_H */