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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-12-10 13:15:42 +0100
committerFelix Held <felix-coreboot@felixheld.de>2019-12-22 13:47:39 +0000
commit7db16ddc8879a5b5acb7681135c7d9439dd1bd99 (patch)
tree63dc4a817763731d34f5dbfe660322ca77bc8fa4 /src/superio
parent0142d441c63a9bb1a7955ea0ba764a2ddbc38d48 (diff)
downloadcoreboot-7db16ddc8879a5b5acb7681135c7d9439dd1bd99.tar.xz
superio/common/conf_mode: Add op to write SSDT
Add functions to write ACPI SSDT code for entering and leaving the config mode. To be used by ACPI generators. Tested on Linux 5.2 using the Aspeed SSDT generator. Change-Id: I14b55b885f1c384536bafafed39ad399639868e4 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37639 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/superio')
-rw-r--r--src/superio/common/conf_mode.c136
1 files changed, 136 insertions, 0 deletions
diff --git a/src/superio/common/conf_mode.c b/src/superio/common/conf_mode.c
index 8ba1cddba9..1e62285444 100644
--- a/src/superio/common/conf_mode.c
+++ b/src/superio/common/conf_mode.c
@@ -17,6 +17,7 @@
#include <arch/io.h>
#include <device/device.h>
#include <superio/conf_mode.h>
+#include <arch/acpigen.h>
/* Common enter/exit implementations */
@@ -77,38 +78,173 @@ void pnp_exit_conf_mode_0202(struct device *dev)
pnp_write_config(dev, 0x02, (1 << 1));
}
+/* Functions for ACPI */
+#if CONFIG(HAVE_ACPI_TABLES)
+static void pnp_ssdt_enter_conf_mode_55(struct device *dev, const char *idx, const char *data)
+{
+ acpigen_write_store();
+ acpigen_write_byte(0x55);
+ acpigen_emit_namestring(idx);
+}
+
+static void pnp_ssdt_enter_conf_mode_6767(struct device *dev, const char *idx, const char *data)
+{
+ acpigen_write_store();
+ acpigen_write_byte(0x67);
+ acpigen_emit_namestring(idx);
+
+ acpigen_write_store();
+ acpigen_write_byte(0x67);
+ acpigen_emit_namestring(idx);
+}
+
+static void pnp_ssdt_enter_conf_mode_7777(struct device *dev, const char *idx, const char *data)
+{
+ acpigen_write_store();
+ acpigen_write_byte(0x77);
+ acpigen_emit_namestring(idx);
+
+ acpigen_write_store();
+ acpigen_write_byte(0x77);
+ acpigen_emit_namestring(idx);
+}
+
+static void pnp_ssdt_enter_conf_mode_8787(struct device *dev, const char *idx, const char *data)
+{
+ acpigen_write_store();
+ acpigen_write_byte(0x87);
+ acpigen_emit_namestring(idx);
+
+ acpigen_write_store();
+ acpigen_write_byte(0x87);
+ acpigen_emit_namestring(idx);
+}
+
+static void pnp_ssdt_enter_conf_mode_a0a0(struct device *dev, const char *idx, const char *data)
+{
+ acpigen_write_store();
+ acpigen_write_byte(0xa0);
+ acpigen_emit_namestring(idx);
+
+ acpigen_write_store();
+ acpigen_write_byte(0xa0);
+ acpigen_emit_namestring(idx);
+
+}
+
+static void pnp_ssdt_enter_conf_mode_a5a5(struct device *dev, const char *idx, const char *data)
+{
+ acpigen_write_store();
+ acpigen_write_byte(0xa5);
+ acpigen_emit_namestring(idx);
+
+ acpigen_write_store();
+ acpigen_write_byte(0xa5);
+ acpigen_emit_namestring(idx);
+}
+
+static void pnp_ssdt_enter_conf_mode_870155aa(struct device *dev,
+ const char *idx, const char *data)
+{
+ acpigen_write_store();
+ acpigen_write_byte(0x87);
+ acpigen_emit_namestring(idx);
+
+ acpigen_write_store();
+ acpigen_write_byte(0x01);
+ acpigen_emit_namestring(idx);
+
+ acpigen_write_store();
+ acpigen_write_byte(0x55);
+ acpigen_emit_namestring(idx);
+
+ acpigen_write_store();
+ if (dev->path.pnp.port == 0x4e)
+ acpigen_write_byte(0xaa);
+ else
+ acpigen_write_byte(0x55);
+ acpigen_emit_namestring(idx);
+}
+
+static void pnp_ssdt_exit_conf_mode_aa(struct device *dev, const char *idx, const char *data)
+{
+ acpigen_write_store();
+ acpigen_write_byte(0xaa);
+ acpigen_emit_namestring(idx);
+}
+
+static void pnp_ssdt_exit_conf_mode_0202(struct device *dev, const char *idx, const char *data)
+{
+
+ acpigen_write_store();
+ acpigen_write_byte(0x02);
+ acpigen_emit_namestring(idx);
+
+ acpigen_write_store();
+ acpigen_write_byte(0x02);
+ acpigen_emit_namestring(data);
+}
+#endif
const struct pnp_mode_ops pnp_conf_mode_55_aa = {
.enter_conf_mode = pnp_enter_conf_mode_55,
.exit_conf_mode = pnp_exit_conf_mode_aa,
+#if CONFIG(HAVE_ACPI_TABLES)
+ .ssdt_enter_conf_mode = pnp_ssdt_enter_conf_mode_55,
+ .ssdt_exit_conf_mode = pnp_ssdt_exit_conf_mode_aa,
+#endif
};
const struct pnp_mode_ops pnp_conf_mode_6767_aa = {
.enter_conf_mode = pnp_enter_conf_mode_6767,
.exit_conf_mode = pnp_exit_conf_mode_aa,
+#if CONFIG(HAVE_ACPI_TABLES)
+ .ssdt_enter_conf_mode = pnp_ssdt_enter_conf_mode_6767,
+ .ssdt_exit_conf_mode = pnp_ssdt_exit_conf_mode_aa,
+#endif
};
const struct pnp_mode_ops pnp_conf_mode_7777_aa = {
.enter_conf_mode = pnp_enter_conf_mode_7777,
.exit_conf_mode = pnp_exit_conf_mode_aa,
+#if CONFIG(HAVE_ACPI_TABLES)
+ .ssdt_enter_conf_mode = pnp_ssdt_enter_conf_mode_7777,
+ .ssdt_exit_conf_mode = pnp_ssdt_exit_conf_mode_aa,
+#endif
};
const struct pnp_mode_ops pnp_conf_mode_8787_aa = {
.enter_conf_mode = pnp_enter_conf_mode_8787,
.exit_conf_mode = pnp_exit_conf_mode_aa,
+#if CONFIG(HAVE_ACPI_TABLES)
+ .ssdt_enter_conf_mode = pnp_ssdt_enter_conf_mode_8787,
+ .ssdt_exit_conf_mode = pnp_ssdt_exit_conf_mode_aa,
+#endif
};
const struct pnp_mode_ops pnp_conf_mode_a0a0_aa = {
.enter_conf_mode = pnp_enter_conf_mode_a0a0,
.exit_conf_mode = pnp_exit_conf_mode_aa,
+#if CONFIG(HAVE_ACPI_TABLES)
+ .ssdt_enter_conf_mode = pnp_ssdt_enter_conf_mode_a0a0,
+ .ssdt_exit_conf_mode = pnp_ssdt_exit_conf_mode_aa,
+#endif
};
const struct pnp_mode_ops pnp_conf_mode_a5a5_aa = {
.enter_conf_mode = pnp_enter_conf_mode_a5a5,
.exit_conf_mode = pnp_exit_conf_mode_aa,
+#if CONFIG(HAVE_ACPI_TABLES)
+ .ssdt_enter_conf_mode = pnp_ssdt_enter_conf_mode_a5a5,
+ .ssdt_exit_conf_mode = pnp_ssdt_exit_conf_mode_aa,
+#endif
};
const struct pnp_mode_ops pnp_conf_mode_870155_aa = {
.enter_conf_mode = pnp_enter_conf_mode_870155aa,
.exit_conf_mode = pnp_exit_conf_mode_0202,
+#if CONFIG(HAVE_ACPI_TABLES)
+ .ssdt_enter_conf_mode = pnp_ssdt_enter_conf_mode_870155aa,
+ .ssdt_exit_conf_mode = pnp_ssdt_exit_conf_mode_0202,
+#endif
};