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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-04 08:09:20 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-14 11:32:06 +0000 |
commit | 3e41b9b22e9ef1b09586474bbe58026987c9fa65 (patch) | |
tree | f72cf00f647207a13fc6915e08a37b98e1daa415 /src/superio | |
parent | 4886cfc50a165ddfe10874611c580f604f172e48 (diff) | |
download | coreboot-3e41b9b22e9ef1b09586474bbe58026987c9fa65.tar.xz |
Remove leftover files
Change-Id: I7fa27a2cbc73b4acae41373a51f600f32b9002bf
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31871
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/superio')
-rw-r--r-- | src/superio/smsc/lpc47b397/early_gpio.c | 45 |
1 files changed, 0 insertions, 45 deletions
diff --git a/src/superio/smsc/lpc47b397/early_gpio.c b/src/superio/smsc/lpc47b397/early_gpio.c deleted file mode 100644 index 66a040cfff..0000000000 --- a/src/superio/smsc/lpc47b397/early_gpio.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2000 AG Electronics Ltd. - * Copyright (C) 2003-2004 Linux Networx - * Copyright (C) 2004 Tyan - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -static void lpc47b397_gpio_offset_out(u16 iobase, u16 offset, u8 value) -{ - outb(value, iobase + offset); -} - -static u8 lpc47b397_gpio_offset_in(u16 iobase, u16 offset) -{ - return inb(iobase+offset); -} - -#if 0 -/* For GP60-GP64, GP66-GP85. */ -#define LPC47B397_GPIO_CNTL_INDEX 0x70 -#define LPC47B397_GPIO_CNTL_DATA 0x71 - -static void lpc47b397_gpio_index_out(u16 iobase, u8 index, u8 value) -{ - outb(index, iobase + LPC47B397_GPIO_CNTL_INDEX); - outb(value, iobase + LPC47B397_GPIO_CNTL_DATA); -} - -static u8 lpc47b397_gpio_index_in(u16 iobase, u8 index) -{ - outb(index, iobase + LPC47B397_GPIO_CNTL_INDEX); - return inb(iobase + LPC47B397_GPIO_CNTL_DATA); -} -#endif |