diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-02-23 22:55:03 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-25 10:17:06 +0000 |
| commit | 4311d9f8528360f0c161d511a016b643b68562f1 (patch) | |
| tree | 55423da2c8da7d98a4e1590f659e18a62f274337 /src/superio | |
| parent | 71b1ed8f77649e153af57b9f033e06e49688e123 (diff) | |
| download | coreboot-4311d9f8528360f0c161d511a016b643b68562f1.tar.xz | |
superio/aspeed/ast2400: drop non-onetime-config registers for iLPC2AHB
The specified PNP registers PNP_MSC0-E (F0-FE) are part of the iLPC2AHB
bridge's index/value interface. They are no one-time config registers
so we can't specify a sane value in the devicetree.
Thus, drop them to stop coreboot from complaining about the missing
entries.
Change-Id: I7d7f16845c755592317f140cca66cca12032f7a6
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39093
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/superio')
| -rw-r--r-- | src/superio/aspeed/ast2400/superio.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/superio/aspeed/ast2400/superio.c b/src/superio/aspeed/ast2400/superio.c index a3d92c22ce..4867f6ed88 100644 --- a/src/superio/aspeed/ast2400/superio.c +++ b/src/superio/aspeed/ast2400/superio.c @@ -82,10 +82,7 @@ static struct pnp_info pnp_dev_info[] = { { NULL, AST2400_GPIO, PNP_IRQ0, }, // GPIO LDN has no IO Region { NULL, AST2400_SUART3, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0xfff8, }, { NULL, AST2400_SUART4, PNP_IO0 | PNP_IRQ0 | PNP_MSC0, 0xfff8, }, - { NULL, AST2400_ILPC2AHB, PNP_IRQ0 | PNP_MSC0 | PNP_MSC1 | PNP_MSC2 - | PNP_MSC3 | PNP_MSC4 | PNP_MSC5 | PNP_MSC6 | PNP_MSC7 - | PNP_MSC8 | PNP_MSC9 | PNP_MSCA | PNP_MSCB | PNP_MSCC - | PNP_MSCD | PNP_MSCE, }, + { NULL, AST2400_ILPC2AHB, PNP_IRQ0 }, { NULL, AST2400_MAILBOX, PNP_IO0 | PNP_IRQ0, 0xfffe, }, }; |