diff options
| author | Julius Werner <jwerner@chromium.org> | 2017-03-16 19:21:51 -0700 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2017-03-28 22:14:03 +0200 |
| commit | 94d9411415e624f70ba8451886e5b96a1f56b159 (patch) | |
| tree | e38a16364600508d41114d7de582cd4445289932 /src/vboot | |
| parent | 1210b41283f70ea2a8b562da940f853442f292ab (diff) | |
| download | coreboot-94d9411415e624f70ba8451886e5b96a1f56b159.tar.xz | |
vboot: Remove CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL Kconfig option
CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL allows the SoC directory to
provide its own main() symbol that can execute code before the generic
verstage code runs. We have now established in other places (e.g. T210
ramstage) a sort of convention that SoCs which need to run code in any
stage before main() should just override stage_entry() instead. This
patch aligns the verstage with that model and gets rid of the extra
Kconfig option. This also removes the need for aliasing between main()
and verstage(). Like other stages the main verstage code is now just in
main() and can be called from stage_entry().
Change-Id: If42c9c4fbab51fbd474e1530023a30b69495d1d6
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18978
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/vboot')
| -rw-r--r-- | src/vboot/Kconfig | 7 | ||||
| -rw-r--r-- | src/vboot/vboot_common.h | 5 | ||||
| -rw-r--r-- | src/vboot/verstage.c | 7 |
3 files changed, 3 insertions, 16 deletions
diff --git a/src/vboot/Kconfig b/src/vboot/Kconfig index e67c108d4a..2b6cde1c19 100644 --- a/src/vboot/Kconfig +++ b/src/vboot/Kconfig @@ -95,13 +95,6 @@ config RETURN_FROM_VERSTAGE reused by the succeeding stage. This is useful if a RAM space is too small to fit both the verstage and the succeeding stage. -config CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL - bool "The chipset provides the main() entry point for verstage" - default n - depends on SEPARATE_VERSTAGE - help - The chipset code provides their own main() entry point. - config VBOOT_DYNAMIC_WORK_BUFFER bool "Vboot's work buffer is dynamically allocated." default y if ARCH_ROMSTAGE_X86_32 && !SEPARATE_VERSTAGE diff --git a/src/vboot/vboot_common.h b/src/vboot/vboot_common.h index 956b54c196..aa01f28944 100644 --- a/src/vboot/vboot_common.h +++ b/src/vboot/vboot_common.h @@ -97,11 +97,10 @@ int vboot_platform_is_resuming(void); /* ============================= VERSTAGE ================================== */ /* - * Main logic for verified boot. verstage() is the stage entry point - * while the verstage_main() is just the core logic. + * Main logic for verified boot. verstage_main() is just the core vboot logic. + * If the verstage is a separate stage, it should be entered via main(). */ void verstage_main(void); -void verstage(void); void verstage_mainboard_init(void); /* Check boot modes */ diff --git a/src/vboot/verstage.c b/src/vboot/verstage.c index 0ec9ca6d27..64fadc736e 100644 --- a/src/vboot/verstage.c +++ b/src/vboot/verstage.c @@ -24,7 +24,7 @@ void __attribute__((weak)) verstage_mainboard_init(void) /* Default empty implementation. */ } -void verstage(void) +void main(void) { console_init(); exception_init(); @@ -37,8 +37,3 @@ void verstage(void) hlt(); } } - -#if !IS_ENABLED(CONFIG_CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL) -/* This is for boards that rely on main() for an entry point of a stage. */ -void main(void) __attribute__((alias ("verstage"))); -#endif |