diff options
| author | David Hendricks <dhendricks@fb.com> | 2018-03-09 14:30:38 -0800 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-07-03 15:53:32 +0000 |
| commit | 7d48ac5c7dfb52fc470bbad1013b4d460bc6a1e0 (patch) | |
| tree | 42002ba1e86627339ff4a6cf38efb4b3f00033bb /src/vendorcode/Makefile.inc | |
| parent | d837e660074e0621d63f59515f933c209441b653 (diff) | |
| download | coreboot-7d48ac5c7dfb52fc470bbad1013b4d460bc6a1e0.tar.xz | |
soc/cavium: Integrate BDK files into coreboot
* Make it compile.
* Fix whitespace errors.
* Fix printf formats.
* Add missing headers includes
* Guard headers with ifdefs
Compile DRAM init code in romstage.
Compile QLM, PCIe, RNG, PHY, GPIO, MDIO init code in ramstage.
Change-Id: I0a93219a14bfb6ebe41103a825d5032b11e7f2c6
Signed-off-by: David Hendricks <dhendricks@fb.com>
Reviewed-on: https://review.coreboot.org/25089
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/Makefile.inc')
| -rw-r--r-- | src/vendorcode/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/vendorcode/Makefile.inc b/src/vendorcode/Makefile.inc index 440972fe9e..522d4150e4 100644 --- a/src/vendorcode/Makefile.inc +++ b/src/vendorcode/Makefile.inc @@ -2,3 +2,4 @@ subdirs-y += amd subdirs-y += google subdirs-y += intel subdirs-y += siemens +subdirs-y += cavium |