summaryrefslogtreecommitdiff
path: root/src/vendorcode/amd/agesa/Proc/Mem/Tech/mttEdgeDetect.h
diff options
context:
space:
mode:
authorFrank Vibrans <frank.vibrans@amd.com>2011-02-14 18:30:54 +0000
committerMarc Jones <marc.jones@amd.com>2011-02-14 18:30:54 +0000
commit2b4c831b4d16b55a7abdea20bce82cccd168232c (patch)
tree95a35c737d16119f1dfa9c1c9d7700710d8a04f7 /src/vendorcode/amd/agesa/Proc/Mem/Tech/mttEdgeDetect.h
parent74ad66cdc143e04f976ba21e538e02b20362d7e6 (diff)
downloadcoreboot-2b4c831b4d16b55a7abdea20bce82cccd168232c.tar.xz
Add AMD Agesa and AMD CIMx SB800 code. Patch 1 of 8.
This code currently generates many warnings that are functionally benign. These are being addressed, but the wheels of bureaucracy turn slowly. This drop supports AMD cpu families 10h and 14h. Only Family 14h is used as an example in this set of patches. Other cpu families are supported by the infrastructure, but their specific support is not included herein. This patch is functionally independent of the other patches in this set. Signed-off-by: Frank Vibrans <frank.vibrans@amd.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/vendorcode/amd/agesa/Proc/Mem/Tech/mttEdgeDetect.h')
-rw-r--r--src/vendorcode/amd/agesa/Proc/Mem/Tech/mttEdgeDetect.h119
1 files changed, 119 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/Proc/Mem/Tech/mttEdgeDetect.h b/src/vendorcode/amd/agesa/Proc/Mem/Tech/mttEdgeDetect.h
new file mode 100644
index 0000000000..73bb6301be
--- /dev/null
+++ b/src/vendorcode/amd/agesa/Proc/Mem/Tech/mttEdgeDetect.h
@@ -0,0 +1,119 @@
+/* $NoKeywords:$ */
+/**
+ * @file
+ *
+ * mttEdgeDetect.h
+ *
+ * Technology Common Training Header file
+ *
+ * @xrefitem bom "File Content Label" "Release Content"
+ * @e project: AGESA
+ * @e sub-project: (Mem)
+ * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
+ *
+ **/
+/*
+ *****************************************************************************
+ *
+ * Copyright (c) 2011, Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ***************************************************************************
+ *
+ */
+
+#ifndef _MTTEDGEDETECT_H_
+#define _MTTEDGEDETECT_H_
+
+/*----------------------------------------------------------------------------
+ * Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
+ *
+ *----------------------------------------------------------------------------
+ */
+
+/*-----------------------------------------------------------------------------
+ * DEFINITIONS AND MACROS
+ *
+ *-----------------------------------------------------------------------------
+ */
+
+
+#define SCAN_LEFT 0 ///< Scan Down
+#define SCAN_RIGHT 1 ///< Scan Up
+#define LEFT_EDGE 0 ///< searching for the left edge
+#define RIGHT_EDGE 1 ///< searching for the right edge
+
+#define SweepStages 4
+#define TRN_DELAY_MAX 31 ///< Max Virtual delay value for DQS Position Training
+
+/*----------------------------------------------------------------------------
+ * TYPEDEFS, STRUCTURES, ENUMS
+ *
+ *----------------------------------------------------------------------------
+ */
+
+/**
+ * Sweep Table Structure. ROM based table defining parameters for DQS position
+ * training delay sweep.
+*/
+typedef struct {
+ INT8 BeginDelay; ///< Starting Delay Value
+ INT8 EndDelay; ///< Ending Delay Value
+ BOOLEAN ScanDir; ///< Scan Direction. 0 = down, 1 = up
+ INT8 Step; ///< Amount to increment delay value
+ UINT16 EndResult; ///< Result value to stop sweeping (to compare with failure mask)
+ BOOLEAN MinMax; ///< Flag indicating lower (left edge) or higher(right edge)
+} DQS_POS_SWEEP_TABLE;
+
+/**
+ * Sweep Information Struct - Used to track data through the DQS Delay Sweep
+ *
+*/
+typedef struct _SWEEP_INFO {
+ BOOLEAN Error; ///< Indicates an Error has been found
+ UINT32 TestAddrRJ16[MAX_CS_PER_CHANNEL]; ///< System address of chipselects RJ 16 bits (Addr[47:16])
+ BOOLEAN CsAddrValid[MAX_CS_PER_CHANNEL]; ///< Indicates which chipselects to test
+ INT8 BeginDelay; ///< Beginning Delay value (Virtual)
+ INT8 EndDelay; ///< Ending Delay value (Virtual)
+ INT8 Step; ///< Amount to Inc or Dec Virtual Delay value
+ BOOLEAN Edge; ///< Left or right edge (0 = LEFT, 1= RIGHT)
+ UINT16 EndResult; ///< Result value that will stop a Dqs Sweep
+ UINT16 InsertionDelayMsk; ///< Mask of Byte Lanes that should use ins. dly. comparison
+ UINT16 LaneMsk; ///< Mask indicating byte lanes to update
+ UINT16 ResultFound; ///< Mask indicating byte lanes where desired result was found on a sweep
+ INT8 *TrnDelays; ///< Delay Values for each byte (Virtual). Points into the delay values
+} SWEEP_INFO; ///< stored in the CH_DEF_STRUCT.
+
+/*----------------------------------------------------------------------------
+ * FUNCTIONS PROTOTYPE
+ *
+ *----------------------------------------------------------------------------
+ */
+
+
+
+#endif /* _MTTEDGEDETECT_H_ */
+
+