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authorKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-24 08:20:51 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-09-26 09:23:27 +0000
commitd42b799a9ecc10d23e2581a1c6c02f3a2d4857a7 (patch)
tree4c1da8403b9603d066519263cd9352dcc1b7dade /src/vendorcode/amd/agesa/f12
parent87df26731eef23c44aa8d9ad92a7ed89d6fbd2ca (diff)
downloadcoreboot-d42b799a9ecc10d23e2581a1c6c02f3a2d4857a7.tar.xz
AGESA: Fix OptionsIds.h include
Fix regression of IDS debugging after commit 1210026 AGESA buildsystem: Reduce include path exposure Mainboard directory was removed from libagesa includes path here, and this resulted with fam15tn and fam16kb using a template OptionsIds.h file under vendorcode/ instead. Add mainboard directory back to include path of libagesa and remove those (empty) template files. Change-Id: Iee4341a527b4c152269565cac85e52db44503ea6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21661 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/amd/agesa/f12')
-rw-r--r--src/vendorcode/amd/agesa/f12/Makefile.inc1
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/IDS/OptionsIds.h79
2 files changed, 1 insertions, 79 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc
index 3855d1d027..3445b29af3 100644
--- a/src/vendorcode/amd/agesa/f12/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f12/Makefile.inc
@@ -36,6 +36,7 @@ AGESA_INC = -I$(src)/vendorcode/amd/include
AGESA_INC += -I$(AGESA_ROOT)
AGESA_INC += -I$(AGESA_ROOT)/../common
AGESA_INC += -I$(AGESA_ROOT)/Include
+AGESA_INC += -I$(src)/mainboard/$(MAINBOARDDIR) # OptionsIds.h
BUILDOPTS_INCLUDES = -I$(AGESA_ROOT)/Config $(AGESA_INC) $(AGESA_AUTOINCLUDES)
diff --git a/src/vendorcode/amd/agesa/f12/Proc/IDS/OptionsIds.h b/src/vendorcode/amd/agesa/f12/Proc/IDS/OptionsIds.h
deleted file mode 100644
index 7b51dfb8f5..0000000000
--- a/src/vendorcode/amd/agesa/f12/Proc/IDS/OptionsIds.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * IDS Option File
- *
- * This file is used to switch on/off IDS features.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: Core
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- */
-/*****************************************************************************
- *
- * Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- ***************************************************************************/
-#ifndef _OPTION_IDS_H_
-#define _OPTION_IDS_H_
-
-/**
- *
- * This file generates the defaults tables for the Integrated Debug Support
- * Module. The documented build options are imported from a user controlled
- * file for processing. The build options for the Integrated Debug Support
- * Module are listed below:
- *
- * IDSOPT_IDS_ENABLED
- * IDSOPT_ERROR_TRAP_ENABLED
- * IDSOPT_CONTROL_ENABLED
- *
- * Warning: When you enable the IDSOPT_CONTROL_NV_TO_CMOS feature.
- * please make the cmos region defined by IDS_OPT_CMOS_REGION_START &
- * IDS_OPT_CMOS_REGION_END can be touched between IDS HOOK point
- * IDS_CPU_Early_Override and IDS_BEFORE_AP_EARLY_HALT of BSP
- *
- * IDSOPT_CONTROL_NV_TO_CMOS
- * IDS_OPT_CMOS_INDEX_PORT
- * IDS_OPT_CMOS_DATA_PORT
- * IDS_OPT_CMOS_REGION_START
- * IDS_OPT_CMOS_REGION_END
- *
- * IDSOPT_TRACING_ENABLED
- * IDSOPT_TRACE_BLD_CFG
- * IDSOPT_PERF_ANALYSIS
- * IDSOPT_ASSERT_ENABLED
- * IDS_DEBUG_PORT
- * IDSOPT_CAR_CORRUPTION_CHECK_ENABLED
- * IDSOPT_DEBUG_CODE_ENABLED
- * IDSOPT_IDT_EXCEPTION_TRAP
- * IDSOPT_C_OPTIMIZATION_DISABLED
- *
- **/
-
-#endif