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| author | efdesign98 <efdesign98@gmail.com> | 2011-08-04 12:09:17 -0600 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2011-08-06 18:06:18 +0200 |
| commit | 84cbce2364cf3e40f24ba37b2f72a711a2e50f58 (patch) | |
| tree | 57c26631dd5c9df392e6c515b0855ef403f1e186 /src/vendorcode/amd/agesa/f14/Include/Ids.h | |
| parent | 0df0e14fb5b613e76ff022359c55d5df5633b40f (diff) | |
| download | coreboot-84cbce2364cf3e40f24ba37b2f72a711a2e50f58.tar.xz | |
Update AMD F14 Agesa to support Rev C0 cpus
This change updates the AMD Agesa code to support the Family 14
rev C0 cpus. It also fixes (again) a ton of warnings, although
not all of them are gone. The warning fixes affect code in the
Family 12 tree as well, so there are some small changes therein.
This code has been tested on a Persimmon and passes Abuild.
This is the first (and largest) of a number of commits to complete
the upgrade.
Change-Id: Id28d9bf7931f8baa2a602f6bb096a5a465ccd20d
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/131
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Include/Ids.h')
| -rw-r--r-- | src/vendorcode/amd/agesa/f14/Include/Ids.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Include/Ids.h b/src/vendorcode/amd/agesa/f14/Include/Ids.h index cbd0b131be..7baa67bd0c 100644 --- a/src/vendorcode/amd/agesa/f14/Include/Ids.h +++ b/src/vendorcode/amd/agesa/f14/Include/Ids.h @@ -9,14 +9,14 @@ * @xrefitem bom "File Content Label" "Release Content" * @e project: AGESA * @e sub-project: IDS - * @e \$Revision: 38634 $ @e \$Date: 2010-09-27 21:39:01 +0800 (Mon, 27 Sep 2010) $ + * @e \$Revision: 44325 $ @e \$Date: 2010-12-22 03:29:53 -0700 (Wed, 22 Dec 2010) $ */ /* ***************************************************************************** * * Copyright (c) 2011, Advanced Micro Devices, Inc. * All rights reserved. - * + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright @@ -27,7 +27,7 @@ * * Neither the name of Advanced Micro Devices, Inc. nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. - * + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -38,7 +38,7 @@ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * + * * *************************************************************************** * */ @@ -568,12 +568,12 @@ typedef enum { //vv- for debug reference only #define IDS_HDT_CONSOLE(f, s, ...) #endif #else - #pragma warning(disable: 4127) - #ifdef __GNUC__ + #ifndef __GNUC__ + #pragma warning(disable: 4127) #define IDS_HDT_CONSOLE(f, s, ...) - #else - #define IDS_HDT_CONSOLE(f, s, ...) - #endif + #else + #define IDS_HDT_CONSOLE(f, s, ...) printk (BIOS_DEBUG, s, ##__VA_ARGS__); + #endif #endif #define IDS_HDT_CONSOLE_FLUSH_BUFFER(x) @@ -625,7 +625,7 @@ typedef enum { //vv- for debug reference only #endif ///For IDS feat use -#define IDS_FAMILY_ALL 0x0ull +#define IDS_FAMILY_ALL 0xFFFFFFFFFFFFFFFFull #define IDS_BSP_ONLY TRUE #define IDS_ALL_CORES FALSE |