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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-04-19 07:17:59 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-05-18 10:44:43 +0200 |
commit | 08311f5033e3adccb8794b6113d72bf7a76e4d00 (patch) | |
tree | aaf0d1ca6cacf2d5a73e45dc9f9193417a4b10fc /src/vendorcode/amd/agesa/f14/Makefile.inc | |
parent | 82171ea0ff9e38462e813b791dd57c8ad95dc768 (diff) | |
download | coreboot-08311f5033e3adccb8794b6113d72bf7a76e4d00.tar.xz |
AGESA vendorcode: Build a common amdlib
Having CFLAGS with -Os disables -falign-function, for
unlucky builds this may delay entry to ramstage by 600ms.
Build the low-level IO functions aligned with -O2 instead.
Change-Id: Ice6781666a0834f1e8e60a0c93048ac8472f27d9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14414
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Makefile.inc')
-rw-r--r-- | src/vendorcode/amd/agesa/f14/Makefile.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Makefile.inc b/src/vendorcode/amd/agesa/f14/Makefile.inc index 3be3559a61..9f117ee145 100644 --- a/src/vendorcode/amd/agesa/f14/Makefile.inc +++ b/src/vendorcode/amd/agesa/f14/Makefile.inc @@ -190,7 +190,6 @@ libagesa-y += Proc/CPU/Family/0x14/cpuF14Utilities.c libagesa-y += Proc/HT/htInterface.c libagesa-y += Proc/GNB/Gfx/GfxStrapsInit.c libagesa-y += Proc/GNB/Nb/NbInitAtEarly.c -libagesa-y += Lib/amdlib.c libagesa-y += Proc/CPU/Feature/cpuCacheFlushOnHalt.c libagesa-y += Proc/CPU/Feature/cpuCpb.c libagesa-y += Proc/Mem/Main/minit.c |