diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-24 10:13:43 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-28 14:36:19 +0000 |
commit | e029c18f67f72fc5542254c58d2d4d9025f6282f (patch) | |
tree | 22780437c07705c846cc4822adb77384b8583f75 /src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB | |
parent | e5cecd0ea42b52ac59cb75abe1bdcc83f391e9bf (diff) | |
download | coreboot-e029c18f67f72fc5542254c58d2d4d9025f6282f.tar.xz |
AGESA f10 vendorcode: Remove unused sources
These fam10 sources under fam12 and fam14 were never built.
Change-Id: Iff0964aba0a061b43144427388c07aea57d6d566
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21179
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB')
6 files changed, 0 insertions, 810 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c deleted file mode 100644 index d657152abb..0000000000 --- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c +++ /dev/null @@ -1,111 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * AMD Family_10 RB Equivalence Table related data - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: CPU/Family/0x10 - * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $ - * - */ -/* - ***************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * *************************************************************************** - * - */ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "cpuFamilyTranslation.h" -#include "Filecode.h" -CODE_GROUP (G1_PEICC) -RDATA_GROUP (G1_PEICC) - - -#define FILECODE PROC_CPU_FAMILY_0X10_REVC_RB_F10RBEQUIVALENCETABLE_FILECODE - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -STATIC CONST UINT16 ROMDATA CpuF10RbMicrocodeEquivalenceTable[] = -{ - 0x1040, 0x1040, - 0x1041, 0x1041, - 0x1042, 0x1041, - 0x1043, 0x1043 -}; - - -/*---------------------------------------------------------------------------------------*/ -/** - * Returns the appropriate microcode patch equivalent ID table. - * - * @CpuServiceMethod{::F_CPU_GET_FAMILY_SPECIFIC_ARRAY}. - * - * @param[in] FamilySpecificServices The current Family Specific Services. - * @param[out] RbEquivalenceTablePtr Points to the first entry in the table. - * @param[out] NumberOfElements Number of valid entries in the table. - * @param[in] StdHeader Header for library and services. - * - */ -VOID -GetF10RbMicrocodeEquivalenceTable ( - IN CPU_SPECIFIC_SERVICES *FamilySpecificServices, - OUT CONST VOID **RbEquivalenceTablePtr, - OUT UINT8 *NumberOfElements, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - *NumberOfElements = ((sizeof (CpuF10RbMicrocodeEquivalenceTable) / sizeof (UINT16)) / 2); - *RbEquivalenceTablePtr = CpuF10RbMicrocodeEquivalenceTable; -} - - diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c deleted file mode 100644 index 9f5c9c81a9..0000000000 --- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c +++ /dev/null @@ -1,121 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * AMD Family_10 RB PCI tables with values as defined in BKDG - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: CPU/FAMILY/0x10 - * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $ - * - */ -/* - ***************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * *************************************************************************** - * - */ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "cpuRegisters.h" -#include "Table.h" -#include "Filecode.h" -CODE_GROUP (G1_PEICC) -RDATA_GROUP (G1_PEICC) - - -#define FILECODE PROC_CPU_FAMILY_0X10_REVC_RB_F10RBHTPHYTABLES_FILECODE - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -// HT Phy T a b l e s -// ------------------------- -STATIC CONST TABLE_ENTRY_FIELDS ROMDATA F10RbHtPhyRegisters[] = -{ -// Erratum 354 -// 0x40:0x48 - { - HtPhyRangeRegister, - { - AMD_FAMILY_10, // CpuFamily - (AMD_F10_RB_C1) // CpuRevision - }, - AMD_PF_ALL, // platformFeatures - { - HTPHY_LINKTYPE_SL0_HT3, // - 0x40, 0x48, // Address - 0x00000040, // regData - 0x00000040, // regMask - } - }, -// 0x50:0x58 - { - HtPhyRangeRegister, - { - AMD_FAMILY_10, // CpuFamily - (AMD_F10_RB_C1) // CpuRevision - }, - AMD_PF_ALL, // platformFeatures - { - HTPHY_LINKTYPE_SL1_HT3, // - 0x50, 0x58, // Address - 0x00000040, // regData - 0x00000040, // regMask - } - }, -}; - -CONST REGISTER_TABLE ROMDATA F10RbHtPhyRegisterTable = { - PrimaryCores, - (sizeof (F10RbHtPhyRegisters) / sizeof (TABLE_ENTRY_FIELDS)), - F10RbHtPhyRegisters -}; - diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c deleted file mode 100644 index 38905bde6c..0000000000 --- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c +++ /dev/null @@ -1,115 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * AMD Family_10 RB Logical ID Table - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: CPU/FAMILY/0x10 - * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $ - * - */ -/* - ***************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * *************************************************************************** - * - */ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "cpuRegisters.h" -#include "Filecode.h" -CODE_GROUP (G1_PEICC) -RDATA_GROUP (G1_PEICC) - - -#define FILECODE PROC_CPU_FAMILY_0X10_REVC_RB_F10RBLOGICALIDTABLES_FILECODE - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -STATIC CONST CPU_LOGICAL_ID_XLAT ROMDATA CpuF10RbLogicalIdAndRevArray[] = -{ - { - 0x1040, - AMD_F10_RB_C0 - }, - { - 0x1041, - AMD_F10_RB_C1 - }, - { - 0x1042, - AMD_F10_RB_C2 - }, - { - 0x1043, - AMD_F10_RB_C3 - } -}; - -VOID -GetF10RbLogicalIdAndRev ( - OUT CONST CPU_LOGICAL_ID_XLAT **RbIdPtr, - OUT UINT8 *NumberOfElements, - OUT UINT64 *LogicalFamily, - IN OUT AMD_CONFIG_PARAMS *StdHeader - ) -{ - *NumberOfElements = (sizeof (CpuF10RbLogicalIdAndRevArray) / sizeof (CPU_LOGICAL_ID_XLAT)); - *RbIdPtr = CpuF10RbLogicalIdAndRevArray; - *LogicalFamily = AMD_FAMILY_10_RB; -} - -//CONST LOGICAL_ID_TABLE ROMDATA CpuF10RbLogicalIdAndRev = -//{ -// (sizeof (CpuF10RbLogicalIdAndRevArray) / sizeof (CPU_LOGICAL_ID_XLAT)), -// (CPU_LOGICAL_ID_XLAT *) &CpuF10RbLogicalIdAndRevArray -//}; diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c deleted file mode 100644 index 23642179f8..0000000000 --- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c +++ /dev/null @@ -1,107 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * AMD Family_10 RB microcode patches - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: CPU/Family/0x10 - * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $ - * - */ -/* - ***************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * *************************************************************************** - * - */ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "cpuRegisters.h" -#include "cpuEarlyInit.h" -#include "cpuFamilyTranslation.h" -#include "Filecode.h" -CODE_GROUP (G1_PEICC) -RDATA_GROUP (G1_PEICC) - - -#define FILECODE PROC_CPU_FAMILY_0X10_REVC_RB_F10RBMICROCODEPATCHTABLES_FILECODE - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -extern CONST MICROCODE_PATCHES ROMDATA *CpuF10RbMicroCodePatchArray[]; -extern CONST UINT8 ROMDATA CpuF10RbNumberOfMicrocodePatches; - - -/*---------------------------------------------------------------------------------------*/ -/** - * Returns a table containing the appropriate microcode patches. - * - * @CpuServiceMethod{::F_CPU_GET_FAMILY_SPECIFIC_ARRAY}. - * - * @param[in] FamilySpecificServices The current Family Specific Services. - * @param[out] RbUcodePtr Points to the first entry in the table. - * @param[out] NumberOfElements Number of valid entries in the table. - * @param[in] StdHeader Header for library and services. - * - */ -VOID -GetF10RbMicroCodePatchesStruct ( - IN CPU_SPECIFIC_SERVICES *FamilySpecificServices, - OUT CONST VOID **RbUcodePtr, - OUT UINT8 *NumberOfElements, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - *NumberOfElements = CpuF10RbNumberOfMicrocodePatches; - *RbUcodePtr = &CpuF10RbMicroCodePatchArray[0]; -} - diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c deleted file mode 100644 index 75757e18bf..0000000000 --- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c +++ /dev/null @@ -1,121 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * AMD Family_10 RB, MSR tables with values as defined in BKDG - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: CPU - * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $ - * - */ -/* - ***************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * *************************************************************************** - * - */ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "cpuRegisters.h" -#include "Table.h" -#include "Filecode.h" -CODE_GROUP (G1_PEICC) -RDATA_GROUP (G1_PEICC) - - -#define FILECODE PROC_CPU_FAMILY_0X10_REVC_RB_F10RBMSRTABLES_FILECODE - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ -STATIC CONST MSR_TYPE_ENTRY_INITIALIZER ROMDATA F10RbMsrRegisters[] = -{ -// M S R T a b l e s -// ---------------------- - -// MSR_DC_CFG (0xC0011022) -// bits[43:42] = 0 -// Errata #326 - { - MsrRegister, - { - AMD_FAMILY_10, // CpuFamily - AMD_F10_RB_C0 // CpuRevision - }, - AMD_PF_MULTI_LINK, // platformFeatures - { - MSR_DC_CFG, // MSR Address - 0x0000000000000000, // OR Mask - 0x00000C0000000000, // NAND Mask - } - }, - -// MSR_BU_CFG (0xC0011023) -// Erratum #309 BU_CFG[23]=1 - { - MsrRegister, - { - AMD_FAMILY_10, // CpuFamily - AMD_F10_RB_C0 // CpuRevision - }, - AMD_PF_ALL, // platformFeatures - { - MSR_BU_CFG, // MSR Address - (1 << 23), // OR Mask - (1 << 23), // NAND Mask - } - } -}; - -CONST REGISTER_TABLE ROMDATA F10RbMsrRegisterTable = { - AllCores, - (sizeof (F10RbMsrRegisters) / sizeof (TABLE_ENTRY_FIELDS)), - (TABLE_ENTRY_FIELDS *) &F10RbMsrRegisters, -}; diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c deleted file mode 100644 index bfe0eb1cdb..0000000000 --- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c +++ /dev/null @@ -1,235 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * AMD Family_10 RB PCI tables with values as defined in BKDG - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: CPU/FAMILY/0x10 - * @e \$Revision: 35136 $ @e \$Date: 2010-07-16 11:29:48 +0800 (Fri, 16 Jul 2010) $ - * - */ -/* - ***************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * *************************************************************************** - * - */ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "cpuRegisters.h" -#include "Table.h" -#include "Filecode.h" -CODE_GROUP (G1_PEICC) -RDATA_GROUP (G1_PEICC) - - -#define FILECODE PROC_CPU_FAMILY_0X10_REVC_RB_F10RBPCITABLES_FILECODE - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -// P C I T a b l e s -// ---------------------- - -STATIC CONST TABLE_ENTRY_FIELDS ROMDATA F10RbPciRegisters[] = -{ - // Function 0 - -// F0x16C - Link Global Extended Control Register, Errata 351 -// bit[15:13] ForceFullT0 = 0 -// bit[5:0] T0Time = 0x14 - { - PciRegister, - { - AMD_FAMILY_10, // CpuFamily - (AMD_F10_RB_C0 | AMD_F10_RB_C1 | AMD_F10_RB_C2) // CpuRevision - }, - AMD_PF_ALL, // platformFeatures - { - MAKE_SBDFO (0, 0, 24, FUNC_0, 0x16C), // Address - 0x00000014, // regData - 0x0000E03F, // regMask - } - }, -// F0x16C - Link Global Extended Control Register -// bit[7:6] InLnSt = 0x01 - { - PciRegister, - { - AMD_FAMILY_10, // CpuFamily - AMD_F10_RB_C3 // CpuRevision - }, - AMD_PF_SINGLE_LINK, // platformFeatures - { - MAKE_SBDFO (0, 0, 24, FUNC_0, 0x16C), // Address - 0x00000040, // regData - 0x000000C0, // regMask - } - }, -// F0x16C - Link Global Extended Control Register -// bit[15:13] ForceFullT0 = 6 -// bit[9] RXCalEn = 1 -// bit[5:0] T0Time = 0x26 - { - PciRegister, - { - AMD_FAMILY_10, // CpuFamily - AMD_F10_RB_C3 // CpuRevision - }, - AMD_PF_SINGLE_LINK, // platformFeatures - { - MAKE_SBDFO (0, 0, 24, FUNC_0, 0x16C), // Address - 0x0000C226, // regData - 0x0000E23F, // regMask - } - }, -// F0x170 - Link Extended Control Register - Link 0, sublink 0 -// Errata 351 (only need to override single link case.) -// bit[8] LS2En = 0, - { - PciRegister, - { - AMD_FAMILY_10, // CpuFamily - (AMD_F10_RB_C0 | AMD_F10_RB_C1 | AMD_F10_RB_C2) // CpuRevision - }, - AMD_PF_ALL, // platformFeatures - { - MAKE_SBDFO (0, 0, 24, FUNC_0, 0x170), // Address - 0x00000000, // regData - 0x00000100, // regMask - } - }, - - -// F3xA0 - Power Control Miscellaneous -// bits[13:11] PllLockTime = 5 - { - PciRegister, - { - AMD_FAMILY_10, // CpuFamily - AMD_F10_RB_C0 // CpuRevision - }, - AMD_PF_ALL, // platformFeatures - { - MAKE_SBDFO (0, 0, 24, FUNC_3, 0xA0), // Address - 0x00002800, // regData - 0x00003800, // regMask - } - }, -// F3xA0 - Power Control Miscellaneous -// bits[28] NbPstateForce = 1 - { - PciRegister, - { - AMD_FAMILY_10, // CpuFamily - AMD_F10_RB_C3 // CpuRevision - }, - AMD_PF_ALL, // platformFeatures - { - MAKE_SBDFO (0, 0, 24, FUNC_3, 0xA0), // Address - 0x10000000, // regData - 0x10000000, // regMask - } - }, -// F3xDC - Clock Power Timing Control 2 -// bits[14:12] NbsynPtrAdj = 6 - { - PciRegister, - { - AMD_FAMILY_10, // CpuFamily - AMD_F10_RB_ALL // CpuRevision - }, - AMD_PF_ALL, // platformFeatures - { - MAKE_SBDFO (0, 0, 24, FUNC_3, 0xDC), // Address - 0x00006000, // regData - 0x00007000, // regMask - } - }, -// F3xDC - Clock Power Timing Control 2 -// bits[14:12] NbsynPtrAdj = 5 - { - PciRegister, - { - AMD_FAMILY_10, // CpuFamily - AMD_F10_C0 // CpuRevision - }, - AMD_PF_ALL, // platformFeatures - { - MAKE_SBDFO (0, 0, 24, FUNC_3, 0xDC), // Address - 0x00005000, // regData - 0x00007000, // regMask - } - }, -// F3xDC - Clock Power Timing Control 2 -// bits[14:12] NbsynPtrAdj = 5 - { - ProfileFixup, - { - AMD_FAMILY_10, // CpuFamily - AMD_F10_C3 // CpuRevision - }, - AMD_PF_ALL, // platformFeatures - { - PERFORMANCE_NB_PSTATES_ENABLE, // PerformanceFeatures - MAKE_SBDFO (0, 0, 24, FUNC_3, 0xDC), // Address - 0x00005000, // regData - 0x00007000, // regMask - } - } -}; - -CONST REGISTER_TABLE ROMDATA F10RbPciRegisterTable = { - PrimaryCores, - (sizeof (F10RbPciRegisters) / sizeof (TABLE_ENTRY_FIELDS)), - F10RbPciRegisters, -}; - |