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authorefdesign98 <efdesign98@gmail.com>2011-08-04 12:09:17 -0600
committerPatrick Georgi <patrick@georgi-clan.de>2011-08-06 18:06:18 +0200
commit84cbce2364cf3e40f24ba37b2f72a711a2e50f58 (patch)
tree57c26631dd5c9df392e6c515b0855ef403f1e186 /src/vendorcode/amd/agesa/f14/Proc/Common
parent0df0e14fb5b613e76ff022359c55d5df5633b40f (diff)
downloadcoreboot-84cbce2364cf3e40f24ba37b2f72a711a2e50f58.tar.xz
Update AMD F14 Agesa to support Rev C0 cpus
This change updates the AMD Agesa code to support the Family 14 rev C0 cpus. It also fixes (again) a ton of warnings, although not all of them are gone. The warning fixes affect code in the Family 12 tree as well, so there are some small changes therein. This code has been tested on a Persimmon and passes Abuild. This is the first (and largest) of a number of commits to complete the upgrade. Change-Id: Id28d9bf7931f8baa2a602f6bb096a5a465ccd20d Signed-off-by: Frank Vibrans <frank.vibrans@amd.com> Signed-off-by: efdesign98 <efdesign98@gmail.com> Reviewed-on: http://review.coreboot.org/131 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/Common')
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEarly.c18
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEnv.c1
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitLate.c17
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitMid.c1
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitPost.c6
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitReset.c11
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitResume.c1
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/AmdLateRunApTask.c1
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3LateRestore.c3
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3Save.c5
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/CommonInits.c1
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/CommonReturns.c1
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.c2
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.h2
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/Common/S3SaveState.c30
15 files changed, 83 insertions, 17 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEarly.c b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEarly.c
index bf74376c4e..ea048eb4de 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEarly.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEarly.c
@@ -60,6 +60,7 @@
#include "cpuServices.h"
#include "CommonInits.h"
#include "GnbInterface.h"
+//#include "GnbInitAtEarly.h"
#include "Filecode.h"
CODE_GROUP (G1_PEICC)
RDATA_GROUP (G1_PEICC)
@@ -87,6 +88,23 @@ EXECUTION_CACHE_REGION InitExeCacheMap[] =
*----------------------------------------------------------------------------------------
*/
+AGESA_STATUS
+AmdEarlyPlatformConfigInit (
+ IN OUT PLATFORM_CONFIGURATION *PlatformConfig,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+AGESA_STATUS
+AllocateExecutionCacheInitializer (
+ IN AMD_CONFIG_PARAMS *StdHeader,
+ IN EXECUTION_CACHE_REGION *AmdExeAddrMapPtr
+ );
+
+AGESA_STATUS
+AmdInitEarlyInitializer (
+ IN AMD_CONFIG_PARAMS *StdHeader,
+ IN OUT AMD_EARLY_PARAMS *EarlyParams
+ );
/*----------------------------------------------------------------------------------------
* E X P O R T E D F U N C T I O N S
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEnv.c b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEnv.c
index c986795370..1e32c21433 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEnv.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitEnv.c
@@ -53,6 +53,7 @@
#include "Ids.h"
#include "cpuEnvInit.h"
#include "heapManager.h"
+#include "CreateStruct.h"
#include "GnbInterface.h"
#include "CommonInits.h"
#include "S3SaveState.h"
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitLate.c b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitLate.c
index 3bc1aa24d7..d5669e4ed4 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitLate.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitLate.c
@@ -83,6 +83,23 @@ extern OPTION_PSTATE_LATE_CONFIGURATION OptionPstateLateConfiguration;
*----------------------------------------------------------------------------------------
*/
+AGESA_STATUS
+AmdLatePlatformConfigInit (
+ IN OUT PLATFORM_CONFIGURATION *PlatformConfig,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
+
+AGESA_STATUS
+AmdInitLateInitializer (
+ IN AMD_CONFIG_PARAMS *StdHeader,
+ IN OUT AMD_LATE_PARAMS *LateParamsPtr
+ );
+
+AGESA_STATUS
+AmdInitLateDestructor (
+ IN AMD_CONFIG_PARAMS *StdHeader,
+ IN AMD_LATE_PARAMS *LateParamsPtr
+ );
/*----------------------------------------------------------------------------------------
* E X P O R T E D F U N C T I O N S
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitMid.c b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitMid.c
index efa668c815..e707f7d49d 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitMid.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitMid.c
@@ -53,6 +53,7 @@
#include "Ids.h"
#include "cpuFeatures.h"
#include "CommonInits.h"
+#include "CreateStruct.h"
#include "GnbInterface.h"
#include "Filecode.h"
CODE_GROUP (G1_PEICC)
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitPost.c b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitPost.c
index c7ab7d4e3c..958d1e5598 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitPost.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitPost.c
@@ -57,6 +57,7 @@
#include "cpuServices.h"
#include "cpuPostInit.h"
#include "AdvancedApi.h"
+#include "CreateStruct.h"
#include "heapManager.h"
#include "CommonInits.h"
#include "cpuServices.h"
@@ -83,6 +84,11 @@ RDATA_GROUP (G1_PEICC)
*----------------------------------------------------------------------------------------
*/
+AGESA_STATUS
+AmdPostPlatformConfigInit (
+ IN OUT PLATFORM_CONFIGURATION *PlatformConfig,
+ IN OUT AMD_CONFIG_PARAMS *StdHeader
+ );
/*----------------------------------------------------------------------------------------
* E X P O R T E D F U N C T I O N S
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitReset.c b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitReset.c
index 2a7b99e30b..a3f0870d73 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitReset.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitReset.c
@@ -80,6 +80,17 @@ extern BUILD_OPT_CFG UserOptions;
*----------------------------------------------------------------------------------------
*/
+AGESA_STATUS
+AmdInitResetExecutionCacheAllocateInitializer (
+ IN AMD_CONFIG_PARAMS *StdHeader,
+ IN EXECUTION_CACHE_REGION *AmdExeAddrMapPtr
+ );
+
+AGESA_STATUS
+AmdInitResetConstructor (
+ IN AMD_CONFIG_PARAMS *StdHeader,
+ IN AMD_RESET_PARAMS *AmdResetParams
+ );
/*----------------------------------------------------------------------------------------
* E X P O R T E D F U N C T I O N S
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitResume.c b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitResume.c
index b199fba482..532f7d51db 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitResume.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdInitResume.c
@@ -60,6 +60,7 @@
#include "cpuRegisters.h"
#include "cpuApicUtilities.h"
#include "cpuPostInit.h"
+#include "CreateStruct.h"
#include "CommonInits.h"
#include "cpuFeatures.h"
CODE_GROUP (G1_PEICC)
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdLateRunApTask.c b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdLateRunApTask.c
index 74aebbcd11..84f5cafef6 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdLateRunApTask.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdLateRunApTask.c
@@ -52,6 +52,7 @@
#include "AGESA.h"
#include "Ids.h"
#include "Options.h"
+#include "CreateStruct.h"
#include "Filecode.h"
CODE_GROUP (G3_DXE)
RDATA_GROUP (G3_DXE)
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3LateRestore.c b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3LateRestore.c
index b38bb67989..62e23d6984 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3LateRestore.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3LateRestore.c
@@ -56,6 +56,7 @@
#include "cpuFeatures.h"
#include "S3SaveState.h"
#include "CommonInits.h"
+#include "CreateStruct.h"
#include "Filecode.h"
CODE_GROUP (G2_PEI)
RDATA_GROUP (G2_PEI)
@@ -120,7 +121,7 @@ AmdS3LateRestore (
ASSERT (S3LateParams != NULL);
BufferPointer = (UINT8 *) S3LateParams->S3DataBlock.VolatileStorage;
- S3LateParams->StdHeader.HeapBasePtr = (UINT64) &BufferPointer[((S3_VOLATILE_STORAGE_HEADER *) S3LateParams->S3DataBlock.VolatileStorage)->HeapOffset];
+ S3LateParams->StdHeader.HeapBasePtr = &BufferPointer[((S3_VOLATILE_STORAGE_HEADER *) S3LateParams->S3DataBlock.VolatileStorage)->HeapOffset];
ASSERT (S3LateParams->StdHeader.HeapBasePtr != NULL);
IDS_OPTION_HOOK (IDS_PLATFORMCFG_OVERRIDE, &S3LateParams->PlatformConfig, &S3LateParams->StdHeader);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3Save.c b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3Save.c
index 147487bb09..f994c87f66 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3Save.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/AmdS3Save.c
@@ -57,6 +57,7 @@
#include "S3.h"
#include "mfs3.h"
#include "CommonInits.h"
+#include "CreateStruct.h"
#include "Filecode.h"
#include "heapManager.h"
#include "Topology.h"
@@ -225,9 +226,9 @@ AmdS3Save (
BufferPointer = AllocParams.BufferPtr;
AmdS3SaveParams->S3DataBlock.VolatileStorage = &(BufferPointer[EarlyBufferSize]);
- ((S3_VOLATILE_STORAGE_HEADER *) AmdS3SaveParams->S3DataBlock.VolatileStorage)->HeapOffset = NULL;
+ ((S3_VOLATILE_STORAGE_HEADER *) AmdS3SaveParams->S3DataBlock.VolatileStorage)->HeapOffset = 0;
((S3_VOLATILE_STORAGE_HEADER *) AmdS3SaveParams->S3DataBlock.VolatileStorage)->HeapSize = HeapSize;
- ((S3_VOLATILE_STORAGE_HEADER *) AmdS3SaveParams->S3DataBlock.VolatileStorage)->RegisterDataOffset = NULL;
+ ((S3_VOLATILE_STORAGE_HEADER *) AmdS3SaveParams->S3DataBlock.VolatileStorage)->RegisterDataOffset = 0;
((S3_VOLATILE_STORAGE_HEADER *) AmdS3SaveParams->S3DataBlock.VolatileStorage)->RegisterDataSize = LateContextSize;
if (HeapSize != 0) {
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/CommonInits.c b/src/vendorcode/amd/agesa/f14/Proc/Common/CommonInits.c
index edfdbb1d89..3b23e205fa 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/CommonInits.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/CommonInits.c
@@ -51,6 +51,7 @@
*/
#include "AGESA.h"
#include "Ids.h"
+#include "CommonInits.h"
#include "Filecode.h"
#include "heapManager.h"
CODE_GROUP (G1_PEICC)
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/CommonReturns.c b/src/vendorcode/amd/agesa/f14/Proc/Common/CommonReturns.c
index 90e2918d2d..4aa9f45dd1 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/CommonReturns.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/CommonReturns.c
@@ -52,6 +52,7 @@
#include "AGESA.h"
#include "Ids.h"
+#include "CommonReturns.h"
#include "Filecode.h"
CODE_GROUP (G1_PEICC)
RDATA_GROUP (G1_PEICC)
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.c b/src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.c
index 68ecb63a3c..1b691a6132 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.c
@@ -136,7 +136,7 @@ AmdCreateStruct (
if (!IsBsp (&InterfaceParams->StdHeader, &IgnoredSts)) {
// APs must transfer their system core number from the mailbox to
// a local register while it is still valid.
- GetCpuServicesOfCurrentCore (&FamilySpecificServices, &InterfaceParams->StdHeader);
+ GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &InterfaceParams->StdHeader);
FamilySpecificServices->TransferApCoreNumber (FamilySpecificServices, &InterfaceParams->StdHeader);
}
InterfaceParams->StdHeader.HeapStatus = HEAP_DO_NOT_EXIST_YET;
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.h b/src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.h
index df47cbeb37..8d539420d3 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.h
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/CreateStruct.h
@@ -98,7 +98,7 @@ typedef struct {
/// Do NOT include a config params header!
OUT PF_AGESA_FUNCTION AgesaFunction; ///< The constructor function
OUT PF_AGESA_DESTRUCTOR AgesaDestructor; ///< The destructor function.
- IN AGESA_BUFFER_HANDLE BufferHandle; ///< The buffer handle id for the service.
+ IN UINT32 BufferHandle; ///< The buffer handle id for the service.
} FUNCTION_PARAMS_INFO;
/**
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Common/S3SaveState.c b/src/vendorcode/amd/agesa/f14/Proc/Common/S3SaveState.c
index 7fe7476128..7c52ed80aa 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Common/S3SaveState.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Common/S3SaveState.c
@@ -77,6 +77,12 @@ extern S3_SCRIPT_CONFIGURATION OptionS3ScriptConfiguration;
*----------------------------------------------------------------------------------------
*/
+AGESA_STATUS
+S3SaveStateExtendTableLenth (
+ IN AMD_CONFIG_PARAMS *StdHeader,
+ IN OUT S3_SAVE_TABLE_HEADER **S3SaveTable
+ );
+
/*----------------------------------------------------------------------------------------*/
/**
* Initialize S3 Script framework
@@ -570,31 +576,31 @@ S3SaveDebugOpcodeString (
{
switch (Op) {
case SAVE_STATE_IO_WRITE_OPCODE:
- return "IO WR";
+ return (CHAR8*)"IO WR";
case SAVE_STATE_IO_READ_WRITE_OPCODE:
- return "IO RD/WR";
+ return (CHAR8*)"IO RD/WR";
case SAVE_STATE_IO_POLL_OPCODE:
- return "IO POLL";
+ return (CHAR8*)"IO POLL";
case SAVE_STATE_MEM_WRITE_OPCODE:
- return "MEM WR";
+ return (CHAR8*)"MEM WR";
case SAVE_STATE_MEM_READ_WRITE_OPCODE:
- return "MEM RD/WR";
+ return (CHAR8*)"MEM RD/WR";
case SAVE_STATE_MEM_POLL_OPCODE:
- return "MEM POLL";
+ return (CHAR8*)"MEM POLL";
case SAVE_STATE_PCI_CONFIG_WRITE_OPCODE:
- return "PCI WR";
+ return (CHAR8*)"PCI WR";
case SAVE_STATE_PCI_CONFIG_READ_WRITE_OPCODE:
- return "PCI RD/WR";
+ return (CHAR8*)"PCI RD/WR";
case SAVE_STATE_PCI_CONFIG_POLL_OPCODE:
- return "PCI POLL";
+ return (CHAR8*)"PCI POLL";
case SAVE_STATE_STALL_OPCODE:
- return "STALL";
+ return (CHAR8*)"STALL";
case SAVE_STATE_DISPATCH_OPCODE:
- return "DISPATCH";
+ return (CHAR8*)"DISPATCH";
default:
IDS_ERROR_TRAP;
}
- return "!!! Unrecognize opcode !!!";
+ return (CHAR8*)"!!! Unrecognize opcode !!!";
}