diff options
author | efdesign98 <efdesign98@gmail.com> | 2011-06-20 18:12:43 -0700 |
---|---|---|
committer | Marc Jones <marcj303@gmail.com> | 2011-06-22 01:35:45 +0200 |
commit | 621ca384a7a5efb2cc7597504dc17b741cd2df10 (patch) | |
tree | 01871adc6d39f48916b5625b3aa1a4b6d5ab9c92 /src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbFuseTable.h | |
parent | 05a89ab922473f375820a3bd68691bb085c62448 (diff) | |
download | coreboot-621ca384a7a5efb2cc7597504dc17b741cd2df10.tar.xz |
Move existing AMD Ffamily14 code to f14 folder
This change moves the AMD Family14 cpu Agesa code to
the vendorcode/amd/agesa/f14 folder to complete the
transition to the family oriented folder structure.
Change-Id: I211e80ee04574cc713f38b4cc1b767dbb2bfaa59
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/52
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbFuseTable.h')
-rw-r--r-- | src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbFuseTable.h | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbFuseTable.h b/src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbFuseTable.h new file mode 100644 index 0000000000..fe41a396a6 --- /dev/null +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Common/GnbFuseTable.h @@ -0,0 +1,80 @@ +/* $NoKeywords:$ */ +/** + * @file + * + * Graphics controller BIF straps control services. + * + * + * + * @xrefitem bom "File Content Label" "Release Content" + * @e project: AGESA + * @e sub-project: GNB + * @e \$Revision: 38902 $ @e \$Date: 2010-10-02 02:01:38 +0800 (Sat, 02 Oct 2010) $ + * + */ +/* + ***************************************************************************** + * + * Copyright (c) 2011, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * *************************************************************************** + * + */ + + +#ifndef _GNBFUSETABLE_H_ +#define _GNBFUSETABLE_H_ + +#pragma pack (push, 1) + +#define PP_FUSE_MAX_NUM_DPM_STATE 5 +#define PP_FUSE_MAX_NUM_SW_STATE 6 +/// Fuse definition structure +typedef struct { + UINT8 PPlayTableRev; ///< PP table revision + UINT8 SclkDpmValid[6]; ///< Valid DPM states + UINT8 SclkDpmDid[5]; ///< Sclk DPM DID + UINT8 SclkDpmVid[5]; ///< Sclk DPM VID + UINT8 SclkDpmCac[5]; ///< Sclk DPM Cac + UINT8 PolicyFlags[6]; ///< State policy flags + UINT8 PolicyLabel[6]; ///< State policy label + UINT8 VclkDid[4]; ///< VCLK DID + UINT8 DclkDid[4]; ///< DCLK DID + UINT8 SclkThermDid; ///< Thermal SCLK + UINT8 VclkDclkSel[6]; ///< Vclk/Dclk selector + UINT8 LclkDpmValid[4]; ///< Valid Lclk DPM states + UINT8 LclkDpmDid[4]; ///< Lclk DPM DID + UINT8 LclkDpmVid[4]; ///< Lclk DPM VID + UINT8 DisplclkDid[4]; ///< Displclk DID + UINT8 PcieGen2Vid; ///< Pcie Gen 2 VID + UINT8 MainPllId; ///< Main PLL Id from fuses + UINT8 WrCkDid; ///< WRCK SMU clock Divisor +} PP_FUSE_ARRAY; + +#pragma pack (pop) + +#endif + |