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authorJulius Werner <jwerner@chromium.org>2019-05-01 16:51:20 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-05-06 10:32:15 +0000
commit7c712bbb6c969ae7014707bfddedd821035a2171 (patch)
tree4c357814eabac828a5d7cea3e0bd90b5b15851d1 /src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbSmuLib.c
parent9d3fa7a22985a2ae080a8e36c89107691d15174f (diff)
downloadcoreboot-7c712bbb6c969ae7014707bfddedd821035a2171.tar.xz
Fix code that would trip -Wtype-limits
This patch fixes up all code that would throw a -Wtype-limits warning. This sometimes involves eliminating unnecessary checks, adding a few odd but harmless casts or just pragma'ing out the warning for a whole file -- I tried to find the path of least resistance. I think the overall benefit of the warning outweighs the occasional weirdness. Change-Id: Iacd37eb1fad388d9db7267ceccb03e6dcf1ad0d2 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32537 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbSmuLib.c')
-rw-r--r--src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbSmuLib.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbSmuLib.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbSmuLib.c
index 76401d435c..bf1396de55 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbSmuLib.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Nb/NbSmuLib.c
@@ -506,7 +506,6 @@ NbSmuReadEfuseField (
UINT32 Address;
UINT16 Shift;
ASSERT (Length <= 32);
- ASSERT (Chain <= 0xff);
Shift = (Offset - (Offset & ~0x7));
Address = 0xFE000000 | (Chain << 12) | (Offset >> 3);
Value = NbSmuReadEfuse (Address, StdHeader);