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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-21 12:58:20 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-09-26 09:21:43 +0000 |
| commit | e66e39059e037d0fcb2b6ed6c1eae13a17d1a433 (patch) | |
| tree | 4d17099104cfccd0560a257f4e60d25224a18c20 /src/vendorcode/amd/agesa/f14 | |
| parent | e52738b42889a8bf6b96fe86b87fbdd73947b367 (diff) | |
| download | coreboot-e66e39059e037d0fcb2b6ed6c1eae13a17d1a433.tar.xz | |
AGESA: Allow const PcieComplexList for OemCustomize
It's already implemented like this with binaryPI API header.
That implementation is essentially the same with 'const' qualifier
just being ignored in the build process for PI blob.
For open-source AGESA build, work around -Werror=discarded-qualifier
using a simple but ugly cast.
Change-Id: Ib84eb9aa40f1f4442f7aeaa8c15f6f1cbc6ca295
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21630
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/vendorcode/amd/agesa/f14')
| -rw-r--r-- | src/vendorcode/amd/agesa/f14/AGESA.h | 2 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/vendorcode/amd/agesa/f14/AGESA.h b/src/vendorcode/amd/agesa/f14/AGESA.h index a2283d14f3..5a87d293cb 100644 --- a/src/vendorcode/amd/agesa/f14/AGESA.h +++ b/src/vendorcode/amd/agesa/f14/AGESA.h @@ -876,7 +876,7 @@ typedef struct { /// GNB configuration info typedef struct { - IN PCIe_COMPLEX_DESCRIPTOR *PcieComplexList; /**< Pointer to array of structures describe PCIe topology on each processor package or NULL. + IN const PCIe_COMPLEX_DESCRIPTOR *PcieComplexList; /**< Pointer to array of structures describe PCIe topology on each processor package or NULL. * Last element of array must be terminated with DESCRIPTOR_TERMINATE_LIST * Example of topology definition for single socket system: * @code diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c index cf5400f191..85859d908f 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c @@ -123,7 +123,7 @@ PcieConfigurationInit ( IDS_HDT_CONSOLE (GNB_TRACE, "PcieConfigurationInit Enter\n"); EarlyParamsPtr = (AMD_EARLY_PARAMS *) StdHeader; - ComplexList = EarlyParamsPtr->GnbConfig.PcieComplexList; + ComplexList = (PCIe_COMPLEX_DESCRIPTOR *)EarlyParamsPtr->GnbConfig.PcieComplexList; AgesaStatus = AGESA_SUCCESS; ComplexesDataLength = 0; NumberOfSockets = GnbGetNumberOfSockets (StdHeader); @@ -381,4 +381,4 @@ PcieConfigDebugDump ( SiliconList = PcieLibGetNextDescriptor (SiliconList); } IDS_HDT_CONSOLE (PCIE_MISC, "<-------------- PCIe Config End------------------>\n"); -}
\ No newline at end of file +} |