diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-29 10:59:39 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-31 04:50:11 +0000 |
commit | 74ecfef2a5ce6ffa554ba27485584cf33f6d73de (patch) | |
tree | 0a6ef46bab903cbbac63a4e1130ccc682d2a78e5 /src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10 | |
parent | 823063c86f9d4957cd506aeda93c82912fd9baf1 (diff) | |
download | coreboot-74ecfef2a5ce6ffa554ba27485584cf33f6d73de.tar.xz |
AGESA f15 vendorcode: Split to Makefile.inc files
Change-Id: I1b7d7c017a4dfd93c5befbc0d5858278eacc6c89
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21264
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10')
3 files changed, 58 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/Makefile.inc b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/Makefile.inc new file mode 100644 index 0000000000..75f7c1ccd4 --- /dev/null +++ b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/Makefile.inc @@ -0,0 +1,34 @@ +libagesa-y += F10InitEarlyTable.c +libagesa-y += F10IoCstate.c +libagesa-y += F10MultiLinkPciTables.c +libagesa-y += F10PmAsymBoostInit.c +libagesa-y += F10PmDualPlaneOnlySupport.c +libagesa-y += F10PmNbCofVidInit.c +libagesa-y += F10PmNbPstateInit.c +libagesa-y += F10SingleLinkPciTables.c +libagesa-y += cpuCommonF10Utilities.c +libagesa-y += cpuF10BrandId.c +libagesa-y += cpuF10BrandIdAm3.c +libagesa-y += cpuF10BrandIdAsb2.c +libagesa-y += cpuF10BrandIdC32.c +libagesa-y += cpuF10BrandIdFr1207.c +libagesa-y += cpuF10BrandIdG34.c +libagesa-y += cpuF10BrandIdS1g3.c +libagesa-y += cpuF10BrandIdS1g4.c +libagesa-y += cpuF10CacheDefaults.c +libagesa-y += cpuF10CacheFlushOnHalt.c +libagesa-y += cpuF10Cpb.c +libagesa-y += cpuF10Dmi.c +libagesa-y += cpuF10EarlyInit.c +libagesa-y += cpuF10FeatureLeveling.c +libagesa-y += cpuF10HtPhyTables.c +libagesa-y += cpuF10MsrTables.c +libagesa-y += cpuF10PciTables.c +libagesa-y += cpuF10PowerCheck.c +libagesa-y += cpuF10PowerMgmtSystemTables.c +libagesa-y += cpuF10PowerPlane.c +libagesa-y += cpuF10Pstate.c +libagesa-y += cpuF10SoftwareThermal.c +libagesa-y += cpuF10Utilities.c +libagesa-y += cpuF10WheaInitDataTables.c +libagesa-y += cpuF10WorkaroundsTable.c diff --git a/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/HY/Makefile.inc b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/HY/Makefile.inc new file mode 100644 index 0000000000..4883524f4c --- /dev/null +++ b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/HY/Makefile.inc @@ -0,0 +1,14 @@ +libagesa-y += F10HyEquivalenceTable.c +libagesa-y += F10HyEquivalenceTable.c +libagesa-y += F10HyHtPhyTables.c +libagesa-y += F10HyHtPhyTables.c +libagesa-y += F10HyInitEarlyTable.c +libagesa-y += F10HyInitEarlyTable.c +libagesa-y += F10HyLogicalIdTables.c +libagesa-y += F10HyLogicalIdTables.c +libagesa-y += F10HyMicrocodePatchTables.c +libagesa-y += F10HyMicrocodePatchTables.c +libagesa-y += F10HyMsrTables.c +libagesa-y += F10HyMsrTables.c +libagesa-y += F10HyPciTables.c +libagesa-y += F10HyPciTables.c diff --git a/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/Makefile.inc b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/Makefile.inc new file mode 100644 index 0000000000..508a63152a --- /dev/null +++ b/src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevD/Makefile.inc @@ -0,0 +1,10 @@ +libagesa-y += F10MicrocodePatch010000c5.c +libagesa-y += F10MicrocodePatch010000c5.c +libagesa-y += F10MicrocodePatch010000d9.c +libagesa-y += F10MicrocodePatch010000d9.c +libagesa-y += F10RevDL3Features.c +libagesa-y += F10RevDL3Features.c +libagesa-y += F10RevDMsgBasedC1e.c +libagesa-y += F10RevDMsgBasedC1e.c +libagesa-y += F10RevDUtilities.c +libagesa-y += F10RevDUtilities.c |