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author | Aaron Durbin <adurbin@chromium.org> | 2014-06-20 14:58:05 -0500 |
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committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-07 17:51:46 +0100 |
commit | df324f5a1064da4f9649e8530aba371394c20eb1 (patch) | |
tree | 9e332fc5e8b7b5c4196d7e684813e35018f993db /src/vendorcode/amd/agesa | |
parent | 6f713d2c5b67afe133b5d5bf05e074837a01f393 (diff) | |
download | coreboot-df324f5a1064da4f9649e8530aba371394c20eb1.tar.xz |
tegra132: add preboot MTS to bct generation
The preboot MTS microcode needs to be supplied within the
bct so the BootROM can load it. The size of the bootblock
space in SPI needed to be extended to accomodate the extra
length.
BUG=chrome-os-partner:29059
BUG=chrome-os-partner:29060
BRANCH=None
TEST=Built rush with updated cbootimage with t132 support.
Original-Change-Id: Iafc1837cd81cc1165a9be5da6ec7425cec2e2ffc
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/204940
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 22e054496465c74fc12afd865d14b87c5858d889)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I5e46c408a7215ecc789b0a0f35070ef9036a7d11
Reviewed-on: http://review.coreboot.org/8466
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/vendorcode/amd/agesa')
0 files changed, 0 insertions, 0 deletions