diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2015-07-30 11:17:40 -0700 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-10-30 18:24:07 +0100 |
commit | d91ddc8d3181b8ab23726c8e744093f39473c202 (patch) | |
tree | 9214b34758be7bb547f7168fc838abeb00e05c7d /src/vendorcode/amd/cimx | |
parent | 772029fe7321e0ddea11711b6756a32f19572db4 (diff) | |
download | coreboot-d91ddc8d3181b8ab23726c8e744093f39473c202.tar.xz |
vendorcode/amd: 64bit fixes
Change-Id: I6a0752cf0c0e484e670acca97c4991b5578845fb
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/11081
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/cimx')
-rw-r--r-- | src/vendorcode/amd/cimx/rd890/Makefile.inc | 5 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb700/ACPILIB.c | 12 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb700/AMDLIB.c | 6 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb700/AZALIA.c | 2 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb700/DISPATCHER.c | 6 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb700/Makefile.inc | 5 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb700/SBDEF.h | 6 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb900/Hudson-2.h | 6 | ||||
-rw-r--r-- | src/vendorcode/amd/cimx/sb900/Makefile.inc | 5 |
9 files changed, 34 insertions, 19 deletions
diff --git a/src/vendorcode/amd/cimx/rd890/Makefile.inc b/src/vendorcode/amd/cimx/rd890/Makefile.inc index 2b56cd367d..7ce625a9d9 100644 --- a/src/vendorcode/amd/cimx/rd890/Makefile.inc +++ b/src/vendorcode/amd/cimx/rd890/Makefile.inc @@ -32,6 +32,11 @@ CPPFLAGS_x86_32 += -I$(src)/northbridge/amd/cimx/rd890 CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/rd890 +CPPFLAGS_x86_64 += -I$(src)/mainboard/$(MAINBOARDDIR) +CPPFLAGS_x86_64 += -I$(src)/northbridge/amd/cimx/rd890 +CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common +CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/rd890 + romstage-y += amdAcpiIvrs.c romstage-y += amdAcpiLib.c romstage-y += amdAcpiMadt.c diff --git a/src/vendorcode/amd/cimx/sb700/ACPILIB.c b/src/vendorcode/amd/cimx/sb700/ACPILIB.c index 807b166146..ebeb828ea9 100644 --- a/src/vendorcode/amd/cimx/sb700/ACPILIB.c +++ b/src/vendorcode/amd/cimx/sb700/ACPILIB.c @@ -50,21 +50,21 @@ void* ACPI_LocateTable( UINT32 Signature ) { - UINT32 i; - UINT32* RsdPtr = (UINT32*)0xe0000; - UINT32* Rsdt = NULL; - DESCRIPTION_HEADER* CurrentTable; + UINT32 i; + UINT32 *RsdPtr = (UINT32 *)0xe0000; + UINT32 *Rsdt = NULL; + DESCRIPTION_HEADER *CurrentTable; do{ // if (*RsdPtr == ' DSR' && *(RsdPtr+1) == ' RTP'){ if ((*RsdPtr == Int32FromChar ('R', 'S', 'D', ' ')) && (*(RsdPtr+1) == Int32FromChar ('R', 'T', 'P', ' '))){ - Rsdt = (UINT32*)((RSDP*)RsdPtr)->RsdtAddress; + Rsdt = (UINT32 *)(uintptr_t)((RSDP *)RsdPtr)->RsdtAddress; break; } RsdPtr+=4; }while (RsdPtr <= (UINT32*)0xffff0); if(Rsdt != NULL && ACPI_GetTableChecksum(Rsdt)==0){ for (i = 0;i < (((DESCRIPTION_HEADER*)Rsdt)->Length - sizeof(DESCRIPTION_HEADER))/4;i++){ - CurrentTable = (DESCRIPTION_HEADER*)*(UINT32*)((UINT8*)Rsdt + sizeof(DESCRIPTION_HEADER) + i*4); + CurrentTable = (DESCRIPTION_HEADER*)(uintptr_t)*(UINT32*)((UINT8*)Rsdt + sizeof(DESCRIPTION_HEADER) + i*4); if (CurrentTable->Signature == Signature) return CurrentTable; } } diff --git a/src/vendorcode/amd/cimx/sb700/AMDLIB.c b/src/vendorcode/amd/cimx/sb700/AMDLIB.c index b2332595f9..b9fea1a41c 100644 --- a/src/vendorcode/amd/cimx/sb700/AMDLIB.c +++ b/src/vendorcode/amd/cimx/sb700/AMDLIB.c @@ -186,7 +186,7 @@ UINT32 Data void ReadMEM ( -UINT32 Address, +UINTN Address, UINT8 OpFlag, void* Value ) @@ -201,7 +201,7 @@ void* Value void WriteMEM ( -UINT32 Address, +UINTN Address, UINT8 OpFlag, void* Value ) @@ -216,7 +216,7 @@ void* Value void RWMEM ( -UINT32 Address, +UINTN Address, UINT8 OpFlag, UINT32 Mask, UINT32 Data diff --git a/src/vendorcode/amd/cimx/sb700/AZALIA.c b/src/vendorcode/amd/cimx/sb700/AZALIA.c index cc72858521..8659c1dd8b 100644 --- a/src/vendorcode/amd/cimx/sb700/AZALIA.c +++ b/src/vendorcode/amd/cimx/sb700/AZALIA.c @@ -268,7 +268,7 @@ void configureAzaliaPinCmd (AMDSBCFG* pConfig, UINT32 ddBAR0, UINT8 dbChannelNum if ( ((pConfig->pAzaliaOemFpCodecTableptr) == NULL) || ((pConfig->pAzaliaOemFpCodecTableptr) == 0xFFFFFFFF)) tempAzaliaCodecEntryPtr = (CODECENTRY*) FIXUP_PTR(&FrontPanelAzaliaCodecTableList[0]); else - tempAzaliaCodecEntryPtr = (CODECENTRY*) pConfig->pAzaliaOemFpCodecTableptr; + tempAzaliaCodecEntryPtr = (CODECENTRY*)(uintptr_t) pConfig->pAzaliaOemFpCodecTableptr; configureAzaliaSetConfigD4Dword(tempAzaliaCodecEntryPtr, ddChannelNum, ddBAR0); } } diff --git a/src/vendorcode/amd/cimx/sb700/DISPATCHER.c b/src/vendorcode/amd/cimx/sb700/DISPATCHER.c index ae5f9b8365..af0d45d7c0 100644 --- a/src/vendorcode/amd/cimx/sb700/DISPATCHER.c +++ b/src/vendorcode/amd/cimx/sb700/DISPATCHER.c @@ -89,7 +89,7 @@ void DispatcherEntry(void *pConfig){ void* LocateImage(UINT32 Signature){ void *Result; UINT8 *ImagePtr = (UINT8*)(0xffffffff - (IMAGE_ALIGN-1)); - while ((UINT32)ImagePtr>=(0xfffffff - (NUM_IMAGE_LOCATION*IMAGE_ALIGN -1))){ + while ((UINTN)ImagePtr>=(0xfffffff - (NUM_IMAGE_LOCATION*IMAGE_ALIGN -1))){ Result = CheckImage(Signature,(void*)ImagePtr); if (Result != NULL) return Result; @@ -129,7 +129,7 @@ void saveConfigPointer(AMDSBCFG* pConfig){ UINT8 dbReg, i; UINT32 ddValue; - ddValue = ((UINT32) pConfig); + ddValue = ((UINTN) pConfig); dbReg = SB_ECMOS_REG08; for (i=0; i<=3; i++){ @@ -143,7 +143,7 @@ void saveConfigPointer(AMDSBCFG* pConfig){ AMDSBCFG* getConfigPointer(){ UINT8 dbReg, dbValue, i; - UINT32 ddValue=0; + UINTN ddValue=0; dbReg = SB_ECMOS_REG08; for (i=0; i<=3; i++){ diff --git a/src/vendorcode/amd/cimx/sb700/Makefile.inc b/src/vendorcode/amd/cimx/sb700/Makefile.inc index aed81c41c6..760423333b 100644 --- a/src/vendorcode/amd/cimx/sb700/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb700/Makefile.inc @@ -32,6 +32,11 @@ CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb700 CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb700 +CPPFLAGS_x86_64 += -I$(src)/mainboard/$(MAINBOARDDIR) +CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb700 +CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common +CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb700 + romstage-y += ACPILIB.c romstage-y += AMDLIB.c romstage-y += AMDSBLIB.c diff --git a/src/vendorcode/amd/cimx/sb700/SBDEF.h b/src/vendorcode/amd/cimx/sb700/SBDEF.h index 01fc1b5daa..184584b808 100644 --- a/src/vendorcode/amd/cimx/sb700/SBDEF.h +++ b/src/vendorcode/amd/cimx/sb700/SBDEF.h @@ -52,9 +52,9 @@ void ReadIndexPCI32(UINT32 PciAddress,UINT32 IndexAddress,void* Value); void WriteIndexPCI32(UINT32 PciAddress,UINT32 IndexAddress,UINT8 OpFlag,void* Value); void RWIndexPCI32(UINT32 PciAddress,UINT32 IndexAddress,UINT8 OpFlag,UINT32 Mask,UINT32 Data); void RWIO (UINT16 Address, UINT8 OpFlag, UINT32 Mask, UINT32 Data); -void ReadMEM(UINT32 Address,UINT8 OpFlag, void* Value); -void WriteMEM(UINT32 Address,UINT8 OpFlag, void* Value); -void RWMEM(UINT32 Address,UINT8 OpFlag,UINT32 Mask,UINT32 Data); +void ReadMEM(UINTN Address,UINT8 OpFlag, void* Value); +void WriteMEM(UINTN Address,UINT8 OpFlag, void* Value); +void RWMEM(UINTN Address,UINT8 OpFlag,UINT32 Mask,UINT32 Data); UINT32 IsFamily10(void); UINT64 ReadMSR(UINT32 Address); void WriteMSR(UINT32 Address,UINT64 Value); diff --git a/src/vendorcode/amd/cimx/sb900/Hudson-2.h b/src/vendorcode/amd/cimx/sb900/Hudson-2.h index 0b9830e064..f13f1f72ce 100644 --- a/src/vendorcode/amd/cimx/sb900/Hudson-2.h +++ b/src/vendorcode/amd/cimx/sb900/Hudson-2.h @@ -1986,9 +1986,9 @@ SB_MISC_REGF0 EQU 0F0h #define MAX_LT_POLLINGS 0x4000 -#define ACPIMMIO32(x) (*(unsigned int*)(unsigned int)(x)) -#define ACPIMMIO16(x) (*(unsigned short*)(unsigned int)(x)) -#define ACPIMMIO8(x) (*(unsigned char*)(unsigned int)(x)) +#define ACPIMMIO32(x) (*(unsigned int*)(uintptr_t)(x)) +#define ACPIMMIO16(x) (*(unsigned short*)(uintptr_t)(x)) +#define ACPIMMIO8(x) (*(unsigned char*)(uintptr_t)(x)) #ifdef XHCI_SUPPORT #define XHCI_ACPI_MMIO_AMD_REG00 0x00 diff --git a/src/vendorcode/amd/cimx/sb900/Makefile.inc b/src/vendorcode/amd/cimx/sb900/Makefile.inc index 8d753d1c4f..5d42b5424b 100644 --- a/src/vendorcode/amd/cimx/sb900/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb900/Makefile.inc @@ -22,6 +22,11 @@ CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb900 CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb900 +CPPFLAGS_x86_64 += -I$(src)/mainboard/$(MAINBOARDDIR) +CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb900 +CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common +CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb900 + romstage-y += AcpiLib.c romstage-y += Azalia.c romstage-y += Dispatcher.c |