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authorStefan Reinauer <reinauer@google.com>2011-10-13 17:26:43 -0700
committerUwe Hermann <uwe@hermann-uwe.de>2011-10-14 22:57:11 +0200
commit971ebd8ee6de9ac30b208da53862918e506ac5e7 (patch)
tree7b8f807b7d76f0f17df208f2292810cac0da4efd /src/vendorcode/amd/cimx
parent86fc9848ae781fca8c7013e785f467d602152395 (diff)
downloadcoreboot-971ebd8ee6de9ac30b208da53862918e506ac5e7.tar.xz
Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6
Change-Id: I672135a9b6e3b641ceb655cb00d40ee760c17edc Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/268 Tested-by: build bot (Jenkins) Reviewed-by: Uwe Hermann <uwe@hermann-uwe.de>
Diffstat (limited to 'src/vendorcode/amd/cimx')
-rw-r--r--src/vendorcode/amd/cimx/sb800/AMDSBLIB.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
index 6c92227eda..b2a0a1b75a 100644
--- a/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
+++ b/src/vendorcode/amd/cimx/sb800/AMDSBLIB.h
@@ -43,6 +43,8 @@
*
*/
+#ifndef __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__
+#define __VENDORCODE_AMD_CIMX_SB800_AMDSBLIB_H__
//AMDSBLIB Routines
@@ -116,3 +118,5 @@ void WriteIo32(IN unsigned short Address, IN unsigned int Data);
//void CpuidRead(IN unsigned int CpuidFcnAddress, OUT CPUID_DATA *Value);
void CpuidRead(unsigned int CpuidFcnAddress, CPUID_DATA *Value);
unsigned char ReadNumberOfCpuCores(void);
+
+#endif